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Record Nr. |
UNISA996465300703316 |
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Titolo |
Hardware and Software: Verification and Testing [[electronic resource] ] : 7th International Haifa Verification Conference, HVC 2011, Haifa, Israel, December 6-8, 2011, Revised Selected Papers / / edited by Kerstin Eder, João Lourenҫo, Onn Shehory |
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Pubbl/distr/stampa |
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Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2012 |
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ISBN |
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Edizione |
[1st ed. 2012.] |
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Descrizione fisica |
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1 online resource (XII, 263 p. 95 illus.) |
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Collana |
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Programming and Software Engineering ; ; 7261 |
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Disciplina |
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Soggetti |
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Software engineering |
Programming languages (Electronic computers) |
Computer logic |
Artificial intelligence |
Software Engineering |
Programming Languages, Compilers, Interpreters |
Logics and Meanings of Programs |
Artificial Intelligence |
Conference proceedings. |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Bibliographic Level Mode of Issuance: Monograph |
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Nota di contenuto |
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Preprocessing and Inprocessing Techniques in SAT -- Pioneering the Future of Verification: A Spiral of Technological and Business Innovation -- Automated Detection and Repair of Concurrency Bugs -- Verification Challenges of Workload Optimized Hardware Systems -- Synthesis with Clairvoyance -- Generalized Reactivity(1) Synthesis without a Monolithic Strategy -- IIS-Guided DFS for Efficient Bounded Reachability Analysis of Linear Hybrid Automata -- Cube and Conquer: Guiding CDCL SAT Solvers by Lookaheads.Implicative Simultaneous Satisfiability and Applications -- Liveness vs Safety – A Practical Viewpoint -- Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search -- SAM: Self-adaptive Dynamic Analysis for Multithreaded Programs -- Concurrent Small Progress Measures -- |
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Specification and Quantitative Analysis of Probabilistic Cloud Deployment Patterns -- Interpolation-Based Function Summaries in Bounded Model Checking -- Can File Level Characteristics Help Identify System Level Fault-Proneness -- Reverse Coverage Analysis -- Symbolic Testing of OpenCL Code -- Dynamic Test Data Generation for Data Intensive Applications -- Injecting Floating-Point Testing Knowledge into Test Generators -- Combining Theorem Proving and Symbolic Trajectory Evaluation in THM&STE -- HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware -- On-Line Detection and Prediction of Temporal Patterns -- Function Summaries in Software Upgrade Checking -- The Rabin Index of Parity Games -- Using Computational Biology Methods to Improve Post-silicon Microprocessor Testing. -- ioneering the Future of Verification: A Spiral of Technological and Business Innovation -- Automated Detection and Repair of Concurrency Bugs -- Verification Challenges of Workload Optimized Hardware Systems -- Synthesis with Clairvoyance -- Generalized Reactivity(1) Synthesis without a Monolithic Strategy -- IIS-Guided DFS for Efficient Bounded Reachability Analysis of Linear Hybrid Automata -- Cube and Conquer: Guiding CDCL SAT Solvers by Lookaheads.Implicative Simultaneous Satisfiability and Applications -- Liveness vs Safety – A Practical Viewpoint -- Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search -- SAM: Self-adaptive Dynamic Analysis for Multithreaded Programs -- Concurrent Small Progress Measures -- Specification and Quantitative Analysis of Probabilistic Cloud Deployment Patterns -- Interpolation-Based Function Summaries in Bounded Model Checking -- Can File Level Characteristics Help Identify System Level Fault-Proneness -- Reverse Coverage Analysis -- Symbolic Testing of OpenCL Code -- Dynamic Test Data Generation for Data Intensive Applications -- Injecting Floating-Point Testing Knowledge into Test Generators -- Combining Theorem Proving and Symbolic Trajectory Evaluation in THM&STE -- HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware -- On-Line Detection and Prediction of Temporal Patterns -- Function Summaries in Software Upgrade Checking -- The Rabin Index of Parity Games -- Using Computational Biology Methods to Improve Post-silicon Microprocessor Testing. |
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Sommario/riassunto |
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This book constitutes the thoroughly refereed post-conference proceedings of the 7th International Haifa Verification Conference, HVC 2011, held in Haifa, Israel in December 2011. The 15 revised full papers presented together with 3 tool papers and 4 posters were carefully reviewed and selected from 43 submissions. The papers are organized in topical sections on synthesis, formal verification, software quality, testing and coverage, experience and tools, and posters- student event. |
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