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Record Nr. |
UNISA996388992303316 |
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Autore |
Nash Thomas <1567-1601.> |
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Titolo |
Pierce Penilesse his supplication to the diuell [[electronic resource] ] : Describing the ouer-spreading of vice, and suppression of vertue. Pleasantly interlac't with variable delights: and pathetically intermixt with conceipted reproofes. Written by Thomas Nash Gentleman |
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Pubbl/distr/stampa |
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London, : Imprinted by [J. Charlewood for] Richard Ihones, dwelling at the Signe of the Rose and Crowne, nere Holburne Bridge, 1592 |
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Descrizione fisica |
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Soggetti |
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Theater - Religious aspects |
Poetry |
England Social life and customs 16th century |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Actual printer's name from STC. |
Reproduction of the original in the British Library. |
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Sommario/riassunto |
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2. |
Record Nr. |
UNINA9910298978603321 |
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Autore |
Biedermann Alexander |
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Titolo |
Design Concepts for a Virtualizable Embedded MPSoC Architecture : Enabling Virtualization in Embedded Multi-Processor Systems / / by Alexander Biedermann |
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Pubbl/distr/stampa |
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Wiesbaden : , : Springer Fachmedien Wiesbaden : , : Imprint : Springer Vieweg, , 2014 |
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ISBN |
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Edizione |
[1st ed. 2014.] |
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Descrizione fisica |
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1 online resource (222 p.) |
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Disciplina |
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Soggetti |
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Computer hardware |
Computer organization |
Software engineering |
Computer Hardware |
Computer Systems Organization and Communication Networks |
Software Engineering/Programming and Operating Systems |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Nota di bibliografia |
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Includes bibliographical references. |
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Nota di contenuto |
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The “Nulticore” Dilemma -- Virtualizable Architecture for embedded MPSoC -- The Virtualizable MPSoC: Requirements, Concepts, and Design Flows -- Application Scenarios -- Conclusion and Outlook. |
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Sommario/riassunto |
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Alexander Biedermann presents a generic hardware-based virtualization approach, which may transform an array of any off-the-shelf embedded processors into a multi-processor system with high execution dynamism. Based on this approach, he highlights concepts for the design of energy aware systems, self-healing systems as well as parallelized systems. For the latter, the novel so-called Agile Processing scheme is introduced by the author, which enables a seamless transition between sequential and parallel execution schemes. The design of such virtualizable systems is further aided by introduction of a dedicated design framework, which integrates into existing, commercial workflows. As a result, this book provides |
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comprehensive design flows for the design of embedded multi-processor systems-on-chip. Contents Virtualization for Embedded Processors Generic Virtualization Layer for Multi-Processor Systems-on-Chip Design Flow for Self-Healing Systems Design Flow for Agile Processing Systems Target Groups Scientists and students in the field of embedded systems, especially reconfigurable systems Engineers in the field of embedded HW/SW systems, such as in the automotive domain About the Author Alexander Biedermann completed his doctoral thesis at the Integrated Circuits and Systems Lab, Technische Universität Darmstadt, and at the Center for Advanced Security Research Darmstadt (CASED) under supervision of Prof. Dr.-Ing. Sorin A. Huss. |
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