IEEE standard VHDL analog and mixed-signal extensions

• Record Nr.: UNISA996280511703316
• Pubbl/distr/stampa: [Place of publication not identified], : Institute of Electrical and Electronics Engineers, 2007
• ISBN: 0-7381-5628-0
• Descrizione fisica: 1 online resource (328 pages)
• Soggetti: Computer hardware description languages - Standards; VHDL (Computer hardware description language) - Standards; Electrical & Computer Engineering; Engineering & Applied Sciences; Electrical Engineering
• Lingua di pubblicazione: Inglese
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Note generali: Bibliographic Level Mode of Issuance: Monograph
• Sommario/riassunto: This standard defines the IEEE 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDL-AMS, is built on IEEE Std 1076-2002 (VHDL) and extends it with additions and changes to provide capabilities of writing and simulating analog and mixed-signal models--