IEEE Standard VHDL Analog and Mixed-Signal Extensions

• Record Nr.: UNISA996280511303316
• Pubbl/distr/stampa: [Place of publication not identified], : IEEE, 1999
• ISBN: 0-7381-1641-6
• Descrizione fisica: 1 online resource (303 pages)
• Collana: Institute of Electrical and Electronics Engineers
• Disciplina: 621.392
• Soggetti: Computer hardware description languages
• Lingua di pubblicazione: Inglese
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Note generali: Bibliographic Level Mode of Issuance: Monograph
• Nota di bibliografia: Includes bibliographical references.
• Sommario/riassunto: This standard defines the IEEE 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDL-AMS, is built on IEEE Std 1076-1993 (VHDL) and extends it with additions and changes to provide capabilities of writing and simulating analog and mixed-signal models.