1.

Record Nr.

UNISA990000770230203316

Autore

KÖRNER, Raimund

Titolo

Denkmalschutz und Eigentumsschutz : die Pflicht zur Erhaltung von Baudenkmälern im Lichte der grundgesetzlichen Eigentumsgewährleistung / von Raimund Körner

Pubbl/distr/stampa

Berln : Duncher & Humblot, 1992

ISBN

3-428-07408-4

Descrizione fisica

184 p ; 24 cm

Collana

Schriften zum Öffentlichen Recht ; 614

Disciplina

344.43094

Soggetti

Patrimonio artistico - Tutela giuridico - Germania

Collocazione

XXIV.1. Coll. 1/ 206 (COLL. AVO 614)

Lingua di pubblicazione

Tedesco

Formato

Materiale a stampa

Livello bibliografico

Monografia



2.

Record Nr.

UNISA996386574603316

Autore

Powle Henry <1630-1692.>

Titolo

The speech of the right honourable Henry Powle, esquire, Speaker of the House of Commons [[electronic resource] ] : delivered to the King and Queen's Majesties, at the banqueting-house in White-Hall, Friday, April 12, 1689. With his Majesty's answer thereto

Pubbl/distr/stampa

[Edinburgh?, : s.n., 1689]

Descrizione fisica

4 p

Soggetti

Broadsides17th century.England

Great Britain History William and Mary, 1689-1702 Early works to 1800

Great Britain Kings and rulers Succession Early works to 1800

Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Note generali

Place and date of publication suggested by Wing (2nd ed.).

A variant of this edition is at Wing 1937:19 indentified as P3113A on reel and P3113B on record; printed on single sheet.

Reproduction of original in: National Library of Scotland.

Sommario/riassunto

eebo-0097



3.

Record Nr.

UNISA996218410303316

Titolo

2005 international conference on reconfigurable computing and FPGAS

Pubbl/distr/stampa

[Place of publication not identified], : IEEE Computer Society, 2005

ISBN

1-5090-9982-4

Descrizione fisica

1 online resource (183 pages) : illustrations

Disciplina

004

Soggetti

Adaptive computing systems

Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Note generali

Bibliographic Level Mode of Issuance: Monograph

Nota di contenuto

Real-time FPGA-based architecture for bicubic interpolation: an application for digital image scaling, -- An image comparison circuit design," -- FPGA-based customizable systolic architecture for image processing applications," -- An FPGA arithmetic logic unit for computing scalar multiplication using the half-and-add method," -- Hardware signal processing unit for one-dimensional variable-length discrete wavelet transform," -- A Handel-C implementation of the back-propagation algorithm on field programmable gate arrays," -- Rapid prototyping of a self-timed ALU with FPGAs," -- FPGA implementation of a synchronous and self-timed neuroprocessor," -- On the design of two-level reconfigurable architectures," -- A secure self-reconfiguring architecture based on open-source hardware," -- Platform for intrinsic evolution of analogue neural networks," -- High quality uniform random number generation for massively parallel simulations in FPGA," -- VANNGen: a flexible CAD tool for hardware implementation of artificial neural networks," -- Quartz: a framework for correct and efficient reconfigurable design," -- Design space exploration of coarse-grain reconfigurable DSPs," -- Optimizing register binding in FPGAs using simulated annealing," -- An FPGA-based parallel sorting architecture for the Burrows Wheeler transform," -- Dynamic voting schemes to enhance evolutionary repair in reconfigurable logic devices," -- Applied VHDL training methodology, EDA framework and hardware implementation platform," -- FPGA implementation of DSVPWM modulator," -- A novel FPGA implementation of a welding control using a new bus architecture," --



On the design of an FPGA-based OFDM modulator for IEEE 802.16-2004," -- Design and implementation of an embedded microprocessor compatible with IL language in accordance to the norm IEC 61131-3," -- VHDL core for 1024-point radix-4 FFT computation," -- Hierarchical FPGA clustering based on multilevel partitioning approach to improve routability and reduce power dissipation," -- FPGA implementation of an efficient multiplier over finite fields GF(2/sup m/)," -- An FPGA-based coprocessor for the SPHINX speech recognition system: early experiences," -- Hardware/software implementation of a discrete cosine transform algorithm using SystemC.