La Galleria d'arte moderna a Firenze / Art. Iahn-Rusconi

• Record Nr.: UNISALENTO991001297709707536
• Autore: Rusconi Jahn, Arturo
• Pubbl/distr/stampa: Roma : La libreria dello Stato, [1934]
• Descrizione fisica: 60 p. : ill. ; 20 cm
• Collana: Itinerari dei musei e monumenti d'Italia
• Disciplina: 708.5
• Soggetti: Firenze Galleria d'arte moderna
• Lingua di pubblicazione: Italiano
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Note generali: In testa al front.: Ministero della educazione nazionale, Direzione generale delle antichità e belle arti

Analog Current-Mode Computational Circuits for Artificial Neural Networks / / by Cosmin Radu Popa

• Record Nr.: UNINA9911039319703321
• Autore: Popa Cosmin Radu
• Pubbl/distr/stampa: Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2025
• ISBN: 9783032039897; 9783032039880
• Edizione: [1st ed. 2025.]
• Descrizione fisica: 1 online resource (233 pages)
• Collana: Analog Circuits and Signal Processing, , 2197-1854
• Disciplina: 621.3815
• Soggetti: Electronic circuit design; Embedded computer systems; Cooperating objects (Computer systems); Electronics Design and Verification; Embedded Systems; Cyber-Physical Systems
• Lingua di pubblicazione: Inglese
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Nota di contenuto: Introduction -- Superior-order approximation functions for generating sigmoidal activation functions -- Superior-order approximation functions for generating radial basis activation functions -- Superior-order approximation functions for artificial neural networks applications -- Analysis and design of analog function synthesizers for implmenting sigmoidal activation functions -- Analysis and design of analog function synthesizers for generating radial basis activation functions -- Analysis and design of analog function synthesizers for artificial neural networks applications -- Low-voltage low-power current-mode CMOS computational circuits for implementing activation functions -- Conclusions.
• Sommario/riassunto: This book discusses in detail low-voltage low-power designs for minimizing the hardware resources required by neural network implementations. The novel method presented in this book for an accurate realization of activation functions for artificial neural networks (ANNs), is based on specific superior-order approximation functions. The author describes analog implementations in CMOS technology to increase the speed of operation, while reducing the hardware resources required for obtaining these approximation functions. Original architectures presented in this book, used for implementing previous CMOS computational structures, allow for operation independent of technological errors and temperature variations. SPICE simulations confirm the theoretically estimated results for previously presented CMOS computational structures, developed for ANNs and artificial intelligence applications.