1.

Record Nr.

UNINA9911020217903321

Autore

Lee Weng Fook

Titolo

Verilog Coding for Logic Synthesis

Pubbl/distr/stampa

[Place of publication not identified], : Wiley Interscience Imprint, 2003

ISBN

9786610556526

9781280556524

1280556528

9780471457558

0471457558

9780470356920

0470356928

9780471457565

0471457566

Edizione

[1st edition]

Descrizione fisica

1 online resource (1 v.) : ill

Disciplina

621.395

Soggetti

Digital electronics

Logic circuits - Computer-aided design

Verilog (Computer hardware description language)

Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Note generali

Bibliographic Level Mode of Issuance: Monograph

Nota di bibliografia

Includes bibliographical references and index.

Nota di contenuto

Introduction -- Asic design flow -- Verilog coding -- Coding style : best-known method for synthesis -- Design example of programmable timer -- Design example of programmable logic block for peripheral interface.

Sommario/riassunto

Provides a practical approach to Verilog design and problem solving. Bulk of the book deals with practical design problems that design engineers solve on a daily basis. Includes over 90 design examples. There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification. Book is suitable for use as a textbook in EE departments that have VLSI courses