| |
|
|
|
|
|
|
|
|
1. |
Record Nr. |
UNINA9911019993003321 |
|
|
Autore |
Bailey Donald G (Donald Graeme), <1962-> |
|
|
Titolo |
Design for Embedded Image Processing on FPGAs |
|
|
|
|
|
Pubbl/distr/stampa |
|
|
Newark : , : John Wiley & Sons, Incorporated, , 2023 |
|
©2024 |
|
|
|
|
|
|
|
|
|
ISBN |
|
9781119819820 |
1119819822 |
9781119819806 |
1119819806 |
|
|
|
|
|
|
|
|
Edizione |
[2nd ed.] |
|
|
|
|
|
Descrizione fisica |
|
1 online resource (499 pages) |
|
|
|
|
|
|
Disciplina |
|
|
|
|
|
|
Soggetti |
|
Image processing |
Field programmable gate arrays |
|
|
|
|
|
|
|
|
Lingua di pubblicazione |
|
|
|
|
|
|
Formato |
Materiale a stampa |
|
|
|
|
|
Livello bibliografico |
Monografia |
|
|
|
|
|
Nota di contenuto |
|
Cover -- Title Page -- Copyright -- Contents -- Chapter 1 Image Processing -- 1.1 Basic Definitions -- 1.2 Image Formation -- 1.2.1 Optics -- 1.2.2 Colour -- 1.3 Image Processing Operations -- 1.4 Real‐time Image Processing -- 1.5 Embedded Image Processing -- 1.6 Computer Architecture -- 1.7 Parallelism -- 1.7.1 Temporal or Task Parallelism -- 1.7.2 Spatial or Data Parallelism -- 1.7.3 Logical Parallelism -- 1.7.4 Stream Processing -- 1.8 Summary -- References -- Chapter 2 Field‐programmable Gate Arrays -- 2.1 Hardware Architecture of FPGAs -- 2.1.1 Logic -- 2.1.2 DSP Blocks -- 2.1.3 Memory -- 2.1.4 Embedded CPU -- 2.1.5 Interconnect -- 2.1.6 Input and Output -- 2.1.7 Clocking -- 2.1.8 Configuration |
|
|
|
|
|
|
|
|
Sommario/riassunto |
|
This book explores the design and implementation of embedded image processing using FPGAs, providing a comprehensive guide for engineers and developers. It covers topics such as image formation, processing techniques, FPGA hardware architecture, and algorithm development. The author, Donald G. Bailey, aims to equip readers with the knowledge to effectively utilize FPGAs for efficient image processing applications. The book is intended for professionals and |
|
|
|
|
|
|
|
|
|
|
students in electronic engineering and computer science, offering detailed insights into parallel processing, hardware description languages, and high-level synthesis tools. |
|
|
|
|
|
| |