|
|
|
|
|
|
|
|
1. |
Record Nr. |
UNINA9911006734003321 |
|
|
Autore |
Riccio Michele |
|
|
Titolo |
Processing and Characteristics of Solid-State Structures |
|
|
|
|
|
Pubbl/distr/stampa |
|
|
Zurich : , : Trans Tech Publications, Limited, , 2024 |
|
©2024 |
|
|
|
|
|
|
|
|
|
ISBN |
|
|
|
|
|
|
|
|
Edizione |
[1st ed.] |
|
|
|
|
|
Descrizione fisica |
|
1 online resource (143 pages) |
|
|
|
|
|
|
Collana |
|
Solid State Phenomena, , 1662-9779 ; ; Volume 358 |
|
|
|
|
|
|
Altri autori (Persone) |
|
IraceAndrea |
BreglioGiovanni |
|
|
|
|
|
|
|
|
Soggetti |
|
Metal oxide semiconductors |
Silicon carbide |
|
|
|
|
|
|
|
|
Lingua di pubblicazione |
|
|
|
|
|
|
Formato |
Materiale a stampa |
|
|
|
|
|
Livello bibliografico |
Monografia |
|
|
|
|
|
Nota di contenuto |
|
Intro -- Processing and Characteristics of Solid-State Structures -- Preface -- Table of Contents -- Investigation of Potential Impact of Nitridation Process on Single Event Gate Rupture Tolerance in SiC MOS Capacitors -- Venus Surface Environmental Chamber Test of SiC JFET-R Multi-Chip Circuit Board -- Coupled Non-Destructive Methods, Kelvin Force Probe Microscopy and µ-Raman to Characterize Doping in 4H-SiC Power Devices -- Concept and Technology for Full Monolithic MOSFET and JBS Vertical Integration in Multi-Terminal 4H-SiC Power Converters -- Comparing 4H-SiC NPN Buffer Layers by Epitaxial Growth and Implantation for Neural Interface Isolation -- Modeling the Charging of Gate Oxide under High Electric Field -- Complementary Two Dimensional Carrier Profiles of 4H-SiC MOSFETs by Scanning Spreading Resistance Microscopy and Scanning Capacitance Microscopy -- Temperature Dependence of 4H-SiC Gate Oxide Breakdown and C-V Properties from Room Temperature to 500 °C -- Detection of Very Fast Interface Traps at 4H-SiC/AlN and 4H-SiC/Al2O3 Interfaces -- A Voltage Adjustable Diode Integrated SiC Trench MOSFET with Barrier Control Gate -- Effects of High Gate Voltage Stress on Threshold Voltage Stability in Planar and Trench SiC Power MOSFETs -- Design of Al2O3/LaAlO3/SiO2 Gate Stack on Various Channel Planes for High- |
|
|
|
|