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Record Nr. |
UNINA9911006725003321 |
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Autore |
Riccio Michele |
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Titolo |
Defects of Solid Semiconductor Structures |
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Pubbl/distr/stampa |
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Zurich : , : Trans Tech Publications, Limited, , 2024 |
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©2024 |
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ISBN |
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Edizione |
[1st ed.] |
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Descrizione fisica |
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1 online resource (179 pages) |
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Collana |
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Defect and Diffusion Forum, , 1662-9507 ; ; Volume 434 |
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Altri autori (Persone) |
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IraceAndrea |
BreglioGiovanni |
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Soggetti |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Nota di contenuto |
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Intro -- Defects of Solid Semiconductor Structures -- Preface -- Table of Contents -- Evaluation of Basal Plane Dislocation Behavior near Epilayer and Substrate Interface -- Body Diode Reliability of 4H-SiC MOSFETs as a Function of Epitaxial Process Parameter -- Accuracy of EVC Method for the PiN Diode Pattern on SiC Epi-Wafer -- Study on Quantification of Correlation between Current Density and UV Irradiation Intensity, Leading to Bar Shaped 1SSF Expansion -- Early Detection of Bar-Shaped 1SSF before Expansion by PL Imaging -- Analysis of Forward Bias Degradation Reduction in 4H-SiC PiN Diodes on Bonded Substrates -- Investigation of Dislocation Behaviors in 4H-SiC Substrate during Post-Growth Thermal Treatment -- The Role of Defects on SiC Device Performance and Ways to Mitigate them -- Emission of Trapped Electrons from the 4H-SiC/SiO2-Interface via Photon-Irradiance at Cryogenic Temperatures -- SiC MOSFET Gate Oxide Quality Improvement Method in Furnace Thermal Oxidation with Lower Pressure Control -- Investigating Dislocation Arrays Induced by Seed Scratches during PVT 4H-SiC Crystal Growth Using Synchrotron X-Ray Topography -- Crystal Originated Defect Monitoring and Reduction in Production Grade SmartSiC™ Engineered Substrates -- Analysis of Lattice Damage in 4H-SiC Epiwafers Implanted with High Energy Al Ions |
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at Elevated Temperatures -- Near-Interface Defect Decomposition during NO Annealing Analyzed by Molecular Dynamics Simulations -- Differences between Polar-Face and Non-Polar Face 4H-SiC/SiO2 Interfaces Revealed by Magnetic Resonance Spectroscopy -- Investigation of BPD Faulting under Extreme Carrier Injection in Room vs High Temperature Implanted 3.3kV SiC MOSFETs -- Epitaxial Defectivity Characterization Combining Surface Voltage and Photoluminescence Mapping on 200mm 4H-SiC Wafers. |
Buffer Layer Dependence of Defectivity in 200mm 4H-SiC Homoepitaxy -- A Study of Process Interruptions during Pre- and Post-Buffer Layer Epitaxial Growth for Defect Reduction in 4H SiC -- Practical Improvement of Noncontact Production Monitoring of Doping in SiC Wafers with Extended Epilayer Defects -- Analysis of Defect Structures during the Early-Stages of PVT Growth of 4H-SiC Crystals -- Development of 3-Channel Inspection Analysis Technique for Defects of SiC Epitaxial Wafers Using Optical Inspection, Photoluminescence and X-Ray Topography -- High-Volume SiC Epitaxial Layer Manufacturing-Maintaining High Materials Quality of Lab Results in Production -- Non-Destructive Quantification of In-Plane Depth Distribution of Sub-Surface Damage on 4H-SiC Wafers Using Laser Light Scattering -- Macro Step Bunching/Debunching Engineering on 4° off 4H-SiC (0001) to Control the BPD-TED Conversion Ratio by Dynamic AGE-Ing® -- Charge Carrier Capture by Prominent Defect Centers in 4H-SiC -- Keyword Index -- Author Index. |
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Sommario/riassunto |
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Special topic volume with invited peer-reviewed papers only. |
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