|
|
|
|
|
|
|
|
1. |
Record Nr. |
UNINA9911006673103321 |
|
|
Titolo |
Handbook of multilevel metallization for integrated circuits : materials, technology, and applications / / edited by Syd R. Wilson and Clarence J. Tracy, John L. Freeman, Jr |
|
|
|
|
|
|
|
Pubbl/distr/stampa |
|
|
Park Ridge, N.J., U.S.A., : Noyes, c1993 |
|
|
|
|
|
|
|
ISBN |
|
0-8155-1761-0 |
1-59124-364-5 |
|
|
|
|
|
|
|
|
Descrizione fisica |
|
1 online resource (912 p.) |
|
|
|
|
|
|
Collana |
|
Materials science and process technology series |
|
|
|
|
|
|
Altri autori (Persone) |
|
WilsonSyd R |
TracyClarence J |
FreemanJohn L |
|
|
|
|
|
|
|
|
Disciplina |
|
|
|
|
|
|
Soggetti |
|
Integrated circuits - Design and construction |
Metallizing |
|
|
|
|
|
|
|
|
Lingua di pubblicazione |
|
|
|
|
|
|
Formato |
Materiale a stampa |
|
|
|
|
|
Livello bibliografico |
Monografia |
|
|
|
|
|
Note generali |
|
Description based upon print version of record. |
|
|
|
|
|
|
Nota di bibliografia |
|
Includes bibliographical references and index. |
|
|
|
|
|
|
Nota di contenuto |
|
""Preface""; ""Contributors""; ""Table of Contents""; ""1 INTRODUCTION""; ""2 SILICIDES AND CONTACTS FOR ULSI""; ""3 ALUMINUM BASED MULTILEVEL METALLIZATIONS IN VLSI/ULSICs""; ""4 INORGANIC DIELECTRICS""; ""5 ORGANIC DIELECTRICS IN MULTILEVEL METALLIZATION OF INTEGRATED CIRCUITS""; ""6 PLANARIZATION TECHNIQUES""; ""7 LITHOGRAPHY AND ETCH ISSUES FOR A MULTILEVEL METALLIZATION SYSTEM""; ""8 ELECTRO- AND STRESS MIGRATION IN MLM INTERCONNECT STRUCTURES""; ""9 MULTILEVEL METALLIZATION TEST VEHICLE""; ""10 MANUFACTURING AND ANALYTIC METHODS"" |
""11 CHARACTERIZATION TECHNIQUES FOR VLSI MULTILEVEL METALLIZATION""""12 ELECTRONIC PACKAGING AND ITS INFLUENCES ON INTEGRATED CIRCUIT DESIGN AND PROCESSING""; ""13 FUTURE INTERCONNECT SYSTEMS""; ""INDEX"" |
|
|
|
|
|
|
|