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1. |
Record Nr. |
UNINA9910143591803321 |
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Titolo |
Approximation, Randomization and Combinatorial Optimization: Algorithms and Techniques : 4th International Workshop on Approximation Algorithms for Combinatorial Optimization Problems, APPROX 2001 and 5th International Workshop on Randomization and Approximation Techniques in Computer Science, RANDOM 2001 Berkeley, CA,USA, August 18-20, 2001 / / edited by Michel Goemans, Klaus Jansen, Jose D.P. Rolim, Luca Trevisan |
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Pubbl/distr/stampa |
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Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2001 |
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ISBN |
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Edizione |
[1st ed. 2001.] |
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Descrizione fisica |
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1 online resource (IX, 296 p.) |
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Collana |
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Lecture Notes in Computer Science, , 1611-3349 ; ; 2129 |
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Disciplina |
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Soggetti |
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Mathematical analysis |
Computer programming |
Discrete mathematics |
Algorithms |
Numerical analysis |
Analysis |
Programming Techniques |
Discrete Mathematics |
Numerical Analysis |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Bibliographic Level Mode of Issuance: Monograph |
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Nota di bibliografia |
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Includes bibliographical references at the end of each chapters and index. |
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Nota di contenuto |
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Invited Talks -- Using Complex Semidefinite Programming for Approximating MAX E2-LIN3 -- Hill-Climbing vs. Simulated Annealing for Planted Bisection Problems -- Web Search via Hub Synthesis -- Error-Correcting Codes and Pseudorandom Projections -- Order in Pseudorandomness -- Contributed Talks of APPROX -- Minimizing Stall Time in Single and Parallel Disk Systems Using Multicommodity Network Flows -- On the Equivalence between the Primal-Dual Schema |
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and the Local-Ratio Technique -- Online Weighted Flow Time and Deadline Scheduling -- An Online Algorithm for the Postman Problem with a Small Penalty -- A Simple Dual Ascent Algorithm for the Multilevel Facility Location Problem -- Approximation Schemes for Ordered Vector Packing Problems -- Incremental Codes -- A 3/2-Approximation Algorithm for Augmenting the Edge-Connectivity of a Graph from 1 to 2 Using a Subset of a Given Edge Set -- Approximation Algorithms for Budget-Constrained Auctions -- Minimizing Average Completion of Dedicated Tasks and Interval Graphs -- A Greedy Facility Location Algorithm Analyzed Using Dual Fitting -- 0.863-Approximation Algorithm for MAX DICUT -- The Maximum Acyclic Subgraph Problem and Degree-3 Graphs -- Some Approximation Results for the Maximum Agreement Forest Problem -- Contributed Talks of RANDOM -- Near-optimum Universal Graphs for Graphs with Bounded Degrees -- On a Generalized Ruin Problem -- On the b-Partite Random Asymmetric Traveling Salesman Problem and Its Assignment Relaxation -- Exact Sampling in Machine Scheduling Problems -- On Computing Ad-hoc Selective Families -- L Infinity Embeddings -- On Euclidean Embeddings and Bandwidth Minimization -- The Non-approximability of Non-Boolean Predicates -- On the Derandomization of Constant Depth Circuits -- Testing Parenthesis Languages -- Proclaiming Dictators and Juntas or Testing Boolean Formulae -- Equitable Coloring Extends Chernoff-Hoeffding Bounds. |
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Sommario/riassunto |
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This book constitutes the joint refereed proceedings of the 4th International Workshop on Approximation Algorithms for Optimization Problems, APPROX 2001 and of the 5th International Workshop on Ranomization and Approximation Techniques in Computer Science, RANDOM 2001, held in Berkeley, California, USA in August 2001. The 26 revised full papers presented were carefully reviewed and selected from a total of 54 submissions. Among the issues addressed are design and analysis of approximation algorithms, inapproximability results, on-line problems, randomization, de-randomization, average-case analysis, approximation classes, randomized complexity theory, scheduling, routing, coloring, partitioning, packing, covering, computational geometry, network design, and applications in various fields. |
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2. |
Record Nr. |
UNINA9910893366403321 |
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Titolo |
Fachserie / Statistisches Bundesamt, Wiesbaden . 3 Land- und Forstwirtschaft, Fischerei . Reihe 2 . 1 . 8 Arbeitskräfte : Agrarstrukturerhebung . |
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Pubbl/distr/stampa |
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Wiesbaden, : Statistische Bundesamt, 2006- |
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Descrizione fisica |
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Collana |
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DeStatis : wissen, nutzen |
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Disciplina |
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Soggetti |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Periodico |
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Note generali |
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3. |
Record Nr. |
UNINA9910437897703321 |
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Autore |
Figueiredo Michael |
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Titolo |
Reference-free CMOS pipeline analog-to-digital converters / / Michael Figueiredo, Joao Goes, Guiomar Evans |
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Pubbl/distr/stampa |
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New York, : Springer, 2012, c2013 |
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ISBN |
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9786613924469 |
9781283612012 |
1283612011 |
9781461434672 |
146143467X |
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Edizione |
[1st ed. 2013.] |
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Descrizione fisica |
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1 online resource (188 p.) |
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Collana |
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Analog circuits and signal processing |
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Altri autori (Persone) |
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Disciplina |
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621.39 |
621.39/814 |
621.39814 |
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Soggetti |
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Analog-to-digital converters |
Electronic circuit design |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Description based upon print version of record. |
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Nota di bibliografia |
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Includes bibliographical references and index. |
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Nota di contenuto |
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Introduction -- General Overview of Pipeline Analog-to-Digital Converters -- Capacitor Mismatch-Insensitive Multiplying-DAC Topologies with Unity Feedback Factor -- Application of Circuit Enhancement Techniques to ADC Building Blocks -- Design of a 7-bit 1GS/s CMOS Two-Way Interleaved Pipeline ADC -- Integrated Prototypes and Experimental Results -- Conclusions. |
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Sommario/riassunto |
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This book shows that digitally assisted analog-to-digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage |
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reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits. Describes various design techniques to enhance the power and area efficiency of building blocks for multiplying digital-to-analog converter (MDAC) based ADCs, such as Pipeline, Algorithmic, and multi-step Flash; Enables analog designers to enhance the performance of a range of circuits, without employing any type of digital assistance (calibration); Includes complete design flow of an ADC based on the proposed circuits and design techniques. |
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