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1. |
Record Nr. |
UNINA9910671499003321 |
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Autore |
Ruiz Orejuela Wilson |
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Titolo |
Responsabilidad del Estado y sus regímenes / / Wilson Ruiz Orejuela |
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Pubbl/distr/stampa |
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Bogotá : , : Ecoe Ediciones, , 2013 |
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ISBN |
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Edizione |
[2a. edición.] |
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Descrizione fisica |
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1 recurso en línea (xv, 558 páginas) |
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Collana |
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Ciencias políticas. Derecho |
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Disciplina |
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Soggetti |
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Government liability |
Torts |
Administrative responsibility |
Responsabilidad del Estado |
Responsabilidad civil |
Responsabilidad administrativa |
Libros electrónicos. |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Nota di bibliografia |
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2. |
Record Nr. |
UNISALENTO991001879059707536 |
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Autore |
Day, David |
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Titolo |
Enciclopedia delle specie estinte / di David Day ; prefazione di sua altezza Reale II Duca di Edimburgo |
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Pubbl/distr/stampa |
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ISBN |
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Descrizione fisica |
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288 p. : ill. (some col.) ; 32 cm |
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Disciplina |
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Soggetti |
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Extinct animals - Dictionaries |
Extinct animals - Pictorial works |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Orig. tit.: The encyclopedia of vanished species. - London edition, 1981 |
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Nota di bibliografia |
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Includes bibliographical references (p. 282-284) and index |
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3. |
Record Nr. |
UNINA9910872636003321 |
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Titolo |
Memory Technology, Design and Testing, 1997: IEEE International Workshop on (MTDT '97) |
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Pubbl/distr/stampa |
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[Place of publication not identified], : IEEE Computer Society Press, 1997 |
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Disciplina |
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Soggetti |
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Semiconductor storage devices - Congresses - Testing |
Random access memory - Congresses |
Electrical & Computer Engineering |
Engineering & Applied Sciences |
Electrical Engineering |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Bibliographic Level Mode of Issuance: Monograph |
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Nota di contenuto |
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Matching memory to the power of personal computers / R. Foss -- A low-cost, high performance three-dimensional memory module technology / A. Glaser ... [et al.] -- High speed circuit techniques in a 150MHz 64M SDRAM / V. Lines ... [et al.] -- An analysis of (linked) addressed decoder faults / A. van de Goor, G. Gaydadjiev -- SRAM yield estimation in the early stage of the design cycle / V. Kim, T. Chen -- False write through and un-restored write electrical level fault models for SRAMs / R. Adams, E. Cooley -- A defect-tolerant DRAM employing a hierarchical redundancy scheme, built-in self-test and self-reconfiguration / D. Niggemeyer, J. Otterstedt, M. Redeker -- Formal verification of memory arrays using symbolic trajectory evaluation / M. Pandey, R. Bryant -- A product development flow with metrics for memory designs / S. Hegde, I. Pal, K. Rao -- A low-power high storage capacity structure for GaAs MESFET ROM / R. Kanan ... [et al.] -- Use of selective precharge for low-power on the match lines of content-addressable memories / C. Zukowski, S. Wang -- An open notation for memory tests / A. Offerman, A. van de Goor -- Testing memory modules in SRAM-based configurable FPGAs / W. Huang ... [et al.] -- Memory array testing through a scannable configuration / S. Yano, N. |
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Ishiura -- A high-speed parallel sensing scheme for multi-level non-volatile memories / C. Calligaro ... [et al.]. |
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