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1. |
Record Nr. |
UNINA990004382900403321 |
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Autore |
Lavaud, Martine |
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Titolo |
Théophile Gautier : militant du romantisme / Martine Lavaud |
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Pubbl/distr/stampa |
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ISBN |
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Descrizione fisica |
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Collana |
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Romantisme et modernités ; 45 |
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Disciplina |
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Locazione |
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Collocazione |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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2. |
Record Nr. |
UNINA9910819122103321 |
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Autore |
Chu Pong P. <1959-> |
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Titolo |
FPGA prototyping by Verilog examples : Xilinx Spartan -3 version / / Pong P. Chu |
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Pubbl/distr/stampa |
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Hoboken, N.J., : J. Wiley & Sons, c2008 |
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ISBN |
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9786611732578 |
9781118210611 |
1118210611 |
9781281732576 |
1281732575 |
9780470374283 |
0470374284 |
9780470374276 |
0470374276 |
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Edizione |
[1st ed.] |
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Descrizione fisica |
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1 online resource (520 p.) |
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Disciplina |
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Soggetti |
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Field programmable gate arrays - Design and construction |
Prototypes, Engineering |
Verilog (Computer hardware description language) |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Description based upon print version of record. |
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Nota di bibliografia |
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Includes bibliographical references (p. 485-486) and index. |
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Nota di contenuto |
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FPGA Prototyping by Verilog Examples; CONTENTS; Preface; Acknowledgments; PART I BASIC DIGITAL CIRCUITS; 1 Gate-level combinational circuit; 1.4 Data types; 1.5 Program skeleton; 1.6 Structural description; 1.7 Testbench; 1.8 Bibliographic notes; 1.9 Suggested experiments; 2 Overview of FPGA and EDA software; 3 RT-level combinationaI circuit; 4 Regular Sequential Circuit; 5 FSM; 6 FSMD; 7 Selected Topics of Verilog; PART II I/O MODULES; 8 UART; 9 PS2 Keyboard; 10 PS2 Mouse; 11 External SRAM; 12 Xilinx Spartan 3 Specific Memory; 13 VGA controller I: graphic; 14 VGA controller II: text |
PART III PICOBLAZE MICROCONTROLLER XILINX SPECIFIC15 PicoBlaze Overview; 16 PicoBlaze Assembly Code Development; 17 PicoBlaze I/O Interface; 18 PicoBlaze Interrupt Interface; Appendix A: Sample Verilog templates; A.1 Numbers and operators; A.2 General Verilog constructs; A.3 Routing with conditional operator and if and case statements; A.4 Combinational circuit using an always block; A.5 Memory Components; A.6 Regular sequential circuits; A.7 FSM; A.8 FSMD; A.9 S3 board constraint file (s3. ucf); References; Topic Index |
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Sommario/riassunto |
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FPGA Prototyping Using Verilog Examples will provide you with a hands-on introduction to Verilog synthesis and FPGA programming through a "learn by doing" approach. By following the clear, easy-to-understand templates for code development and the numerous practical examples, you can quickly develop and simulate a sophisticated digital circuit, realize it on a prototyping device, and verify the operation of its physical implementation. This introductory text that will provide you with a solid foundation, instill confidence with rigorous examples for complex systems and prepare you for fu |
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