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Record Nr. |
UNINA9910783114603321 |
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Autore |
Vaucher Cicero S |
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Titolo |
Architectures for RF frequency synthesizers |
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Pubbl/distr/stampa |
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Boston, MA : , : Springer US, , 2002 |
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ISBN |
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Descrizione fisica |
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1 online resource (XXVI, 250 p. 27 illus.) |
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Collana |
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The Kluwer international series in engineering and computer science Architectures for RF frequency synthesizers |
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Disciplina |
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Soggetti |
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Frequency synthesizers - Design and construction |
Radio frequency oscillators |
Phase-locked loops |
Integrated circuits |
Radio frequency integrated circuits |
Electrical & Computer Engineering |
Engineering & Applied Sciences |
Electrical Engineering |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Bibliographic Level Mode of Issuance: Monograph |
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Nota di contenuto |
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Tuning System Specifications -- Single-Loop Architectures -- Wide-Band Tuning System Architectures -- Adaptive PLL Architecture Combining High Spectral Purity and Fast Settling Time -- Architecture and Circuit Design of Programmable Dividers -- Conclusions. |
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Sommario/riassunto |
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Frequency synthesizers are an essential building block of RF communication products. They can be found in traditional consumer products, in personal communication systems, and in optical communication equipment. Since frequency synthesizers are used in many different applications, different performance aspects may need to be considered in each case. The main body of the text describes a conceptual framework for analyzing the performance of PLL frequency synthesizers, and presents optimization procedures for the different performance aspects. The analysis of the PLL properties is performed with the use of the open-loop bandwidth and phase margin concepts, to enable the influence of higher-order poles to be taken into account from the beginning of the design process. The theoretical system |
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