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Record Nr. |
UNINA9910760261703321 |
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Titolo |
In-Memory Computing Hardware Accelerators for Data-Intensive Applications / / edited by Baker Mohammad and Yasmin Halawani |
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Pubbl/distr/stampa |
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Cham, Switzerland : , : Springer, , [2024] |
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©2024 |
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ISBN |
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Edizione |
[First edition.] |
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Descrizione fisica |
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1 online resource (145 pages) |
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Disciplina |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Nota di contenuto |
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Chapter 1 Data-Centric Computing Paradigm Shift, And Domain-Specific Architecture and Hardware -- Chapter 2 SRAM-based In-Memory Computing: Circuits, Functions, and Applications -- Chapter 3 In and Near-Memory Computing using DRAM -- Chapter 4 MRAM-based In-Memory Computing -- Chapter 5 In-Memory Computing using Phase Change Memory -- Chapter 6 Memristor-Based In-Memory Computing -- Chapter 7 In-Memory Computing using FLASH Memory. |
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Sommario/riassunto |
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This book describes the state-of-the-art of technology and research on In-Memory Computing Hardware Accelerators for Data-Intensive Applications. The authors discuss how processing-centric computing has become insufficient to meet target requirements and how Memory-centric computing may be better suited for the needs of current applications. This reveals for readers how current and emerging memory technologies are causing a shift in the computing paradigm. The authors do deep-dive discussions on volatile and non-volatile memory technologies, covering their basic memory cell structures, operations, different computational memory designs and the challenges associated with them. Specific case studies and potential applications are provided along with their current status and commercial availability in the market. Explains how traditional computer architecture limits data movements (memory wall) and the associated impacts; Discusses computing paradigms such as In-Memory or near-memory computing for emerging applications such as |
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AI; Uses case studies to explain the tradeoff between accuracy, computing complexity, and latency. . |
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