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Record Nr. |
UNINA9910734868403321 |
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Autore |
Shah Nimish |
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Titolo |
Efficient Execution of Irregular Dataflow Graphs [[electronic resource] ] : Hardware/Software Co-optimization for Probabilistic AI and Sparse Linear Algebra / / by Nimish Shah, Wannes Meert, Marian Verhelst |
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Pubbl/distr/stampa |
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Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2023 |
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ISBN |
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Edizione |
[1st ed. 2023.] |
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Descrizione fisica |
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1 online resource (XXI, 143 p. 1 illus.) |
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Disciplina |
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Soggetti |
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Electronic circuits |
Embedded computer systems |
Machine learning |
Electronic Circuits and Systems |
Embedded Systems |
Machine Learning |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Nota di contenuto |
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Chapter 1. Irregular workloads at risk of losing the hardware lottery -- Chapter 2. Suitable data representation: A study of fixed point, floating point,and positTM formats for probabilistic AI -- Chapter 3. GraphOpt: constrained-optimization-based parallelization of irregular workloads for multicore processors -- Chapter 4. DAG Processing Unit version 1 (DPU): Efficient execution of irregular workloads on a multicore processor -- Chapter 5. DAG Processing Unit version 2 (DPU-v2): Efficient execution of irregular workloads on a spatial datapath -- Chapter 6. Conclusions and future work. |
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Sommario/riassunto |
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This book focuses on the acceleration of emerging irregular sparse workloads, posed by novel artificial intelligent (AI) models and sparse linear algebra. Specifically, the book outlines several co-optimized hardware-software solutions for a highly promising class of emerging sparse AI models called Probabilistic Circuit (PC) and a similar sparse matrix workload for triangular linear systems (SpTRSV). The authors describe optimizations for the entire stack, targeting applications, compilation, hardware architecture and silicon implementation, |
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resulting in orders of magnitude higher performance and energy-efficiency compared to the existing state-of-the-art solutions. Thus, this book provides important building blocks for the upcoming generation of edge AI platforms. Analyzes the key bottlenecks in the existing platforms for these sparse and irregular AI and linear algebra algorithms; Discusses an emerging set of AI workloads that rely on sparse matrix operations and graph-based computations; Shows how to address the execution challenges of this novel class of algorithms through hardware-software codesign. |
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