Algorithms and VLSI implementations of MIMO detection / / Ibrahim A. Bello, Basel Halak

• Record Nr.: UNINA9910585794503321
• Autore: Bello Ibrahim A.
• Pubbl/distr/stampa: Cham, Switzerland : , : Springer, , [2022]; ©2022
• ISBN: 3-031-04512-2
• Descrizione fisica: 1 online resource (xxi, 150 pages) : illustrations
• Disciplina: 733
• Soggetti: Detectors
• Lingua di pubblicazione: Inglese
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Nota di bibliografia: Includes bibliographical references and index.
• Nota di contenuto: Intro -- Preface -- Acknowledgements -- Contents -- About the Authors -- Acronyms -- List of Figures -- List of Tables -- 1 Introduction -- 1.1 Chapter Overview -- 1.2 Introduction -- 1.3 System Model -- 1.4 MIMO Detection -- 1.5 Hardware Implementation -- 1.6 Design Tradeoffs -- 1.7 Overview of the Book -- 1.8 Conclusion -- References -- 2 Linear Detection Techniques for MIMO -- 2.1 Chapter Overview -- 2.2 Introduction -- 2.3 Zero-Forcing -- 2.4 Minimum Mean Square Error -- 2.5 Complexity of Linear Detection -- 2.6 Successive Interference Cancellation Aided Linear Detection -- 2.7 Lattice Reduction -- 2.7.1 Lattice Reduction Aided Linear Detection -- 2.7.2 Lattice Reduction with Successive Interference Cancellation -- 2.8 Linear Detection-Based Preprocessing -- 2.9 BER Simulation -- 2.10 Matrix Operations -- 2.10.1 Matrix Inversion -- 2.10.1.1 Cramer's Rule -- 2.10.1.2 Gaussian Elimination -- 2.10.1.3 LU Decomposition -- 2.10.2 QR Decomposition -- 2.10.2.1 Gram-Schmidt Orthogonalisation -- 2.10.2.2 Householder Transformations -- 2.10.2.3 Givens Rotation -- 2.10.2.4 Coordinate Rotation Digital Computer -- 2.10.2.5 CORDIC Hardware Implementation -- 2.11 Conclusion -- Appendix -- References -- 3 Algorithm and VLSI Implementation of Sphere Decoding -- 3.1 Chapter Overview -- 3.2 Introduction -- 3.3 Sphere Decoding Tree Search -- 3.4 Schnorr-Euchner Enumeration -- 3.4.1 Tabular Enumeration -- 3.4.2 Real-Valued Channel Decomposition -- 3.4.3 Orthogonal Real-Valued Channel Decomposition -- 3.5 ; Complexity of Sphere Decoding -- 3.5.1 Detection Ordering -- 3.5.2 Early Termination -- 3.6 Soft-Output Sphere Decoding -- 3.6.1 List Sphere Decoder -- 3.6.2 Single Tree-Search Soft-Output Sphere Decoder -- 3.7 Sphere Decoder Simulation -- 3.8 Hardware Implementation -- 3.8.1 Previous Works -- 3.8.2 Design Example -- 3.8.2.1 Fixed-Point Simulation.; 3.8.2.2 Hardware Implementation -- 3.8.2.3 Results and Discussion -- 3.9 Design Considerations -- 3.10 Conclusion -- Appendix -- References -- 4 Algorithm and VLSI Implementation of K-Best Detection -- 4.1 Chapter Overview -- 4.2 Introduction -- 4.3 K-Best Algorithm -- 4.4 Real-Valued Channel Model K-Best Detection -- 4.5 Non-constant K-Best Detection -- 4.6 Sorting -- 4.6.1 Bubble Sort -- 4.6.2 Multi-Cycle Merge -- 4.6.3 Batcher's Merge -- 4.6.3.1 Odd-Even Merge -- 4.6.3.2 Bitonic Merge -- 4.6.4 Relaxed Sort -- 4.6.5 Schnorr-Euchner Enumeration -- 4.7 Preprocessing -- 4.8 Complexity of the K-Best Algorithm -- 4.9 Hardware Implementation -- 4.9.1 Previous Works -- 4.9.2 Design Example -- 4.9.2.1 Approximate K-Best Algorithm -- 4.9.2.2 Hardware Architecture -- 4.9.2.3 Processing Element -- 4.9.2.4 Sorting Stage -- 4.9.2.5 Controller -- 4.9.2.6 Signal and Channel Inputs -- 4.9.2.7 Results and Discussion -- 4.9.2.8 Soft-Output K-Best Detection -- 4.10 Design Considerations -- 4.10.1 Throughput -- 4.10.2 Channel Model -- 4.10.3 Architecture -- 4.11 Conclusion -- Appendix -- References -- 5 Design Methodology for MIMO Detection -- 5.1 Chapter Overview -- 5.2 Introduction -- 5.3 Review of MIMO Detection -- 5.4 Modelling and Simulation -- 5.4.1 MATLAB Executable Files -- 5.4.2 Vectorised Operations -- 5.4.3 Multicore Operation -- 5.4.4 Computer Clusters -- 5.5 Register Transfer Level Implementation -- 5.5.1 Verilog -- 5.5.2 SystemVerilog -- 5.5.3 Number Representation -- 5.5.4 Integers -- 5.5.5 Fractional Numbers -- 5.5.5.1 Floating-Point Format -- 5.5.5.2 Fixed-Point Format -- 5.5.5.3 Complex Numbers -- 5.5.6 Arithmetic Operations -- 5.5.7 Relational Operations -- 5.5.8 Q Format Representation in SystemVerilog -- 5.5.9 Fixed-Point Simulation -- 5.5.10 Finite State Machines -- 5.5.11 State Encoding -- 5.5.12 Resets -- 5.6 Design Verification.; 5.6.1 Variable Assignments -- 5.6.2 Arithmetic Overflows and Underflows -- 5.6.3 Latches -- 5.6.4 Interconnections -- 5.7 Synthesis -- 5.7.1 Top-Down Approach -- 5.7.2 Bottom-Up Approach -- 5.7.3 Mixed-Mode Approach -- 5.8 Energy-Efficient MIMO Detection -- 5.8.1 Power Consumption -- 5.8.2 Throughput -- 5.8.3 Adaptive MIMO Detection -- 5.9 Conclusion -- References -- Conclusion of the Book -- Index.