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Record Nr. |
UNINA9910512178203321 |
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Autore |
Donzellini Giuliano |
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Titolo |
Introduction to Microprocessor-Based Systems Design |
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Pubbl/distr/stampa |
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Cham : , : Springer International Publishing AG, , 2022 |
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©2022 |
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ISBN |
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9783030873448 |
9783030873431 |
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Descrizione fisica |
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1 online resource (632 pages) |
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Altri autori (Persone) |
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GaravagnoAndrea Mattia |
OnetoLuca |
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Soggetti |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Nota di contenuto |
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Intro -- Foreword of Prof. Donatella Sciuto -- Preface of the Authors -- Digital Contents of the Book -- Contents -- 1 Introduction to programmable computing networks -- 1.1 A general introduction to microprocessors -- 1.1.1 A brief history of microprocessors -- 1.1.2 Types of microcomputers -- 1.1.3 Microcomputers and systems -- 1.1.4 The basic structure of a generic computer -- 1.1.5 The common bus connection -- 1.2 Design of a programmable computing network -- 1.2.1 The design specification: a dedicated computing network -- 1.2.2 Counter and ROM memory based sequencer -- 1.2.3 Extending computing possibilities -- 1.2.4 ALU-based computing networks -- 1.2.5 The "instructions -- 1.2.6 "Program", "programming" and other important terms -- 1.3 Sequencing, microinstructions and microprograms -- 1.3.1 A more compact sequencer -- 1.3.2 The microprogrammed sequencer -- 1.3.3 The microprogrammed sequencer and the computing network -- 1.3.4 How it works -- 1.3.5 Executing a sequence of instructions -- 1.3.6 Executing the first instruction during start up -- 1.3.7 The "instruction pipeline -- 1.3.8 Defining microprograms -- 1.3.9 Rewriting the program of the average of four operands -- 1.4 Jumps, loops and decisions -- 1.4.1 Loops and jump instructions -- 1.4.2 Decisions and conditional jump instructions -- 1.4.3 The FLAG register -- 1.4.4 Controlling jump conditions -- |
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1.4.5 Example: How to use conditional jumps -- 1.5 Input and output ports -- 1.5.1 Input ports -- 1.5.2 Output ports -- 1.5.3 How to use ports -- 1.6 Constants, variables and read/write memory -- 1.6.1 Constants -- 1.6.2 Immediate addressing instructions -- 1.6.3 Variables -- 1.6.4 Read/write memory (RAM) -- 1.6.5 RAM read/write instructions -- 1.6.6 The RAM and the processor -- 1.6.7 Instructions with direct addressing -- 1.6.8 Use of the Mp8E network: examples. |
1.6.9 Final considerations on the processor developed here -- 1.7 Exercises -- 1.7.1 Dedicated computing networks -- 1.7.2 Programmable computing networks -- 1.7.3 Microprogramming new instructions -- 1.8 Solutions -- 1.8.1 Dedicated computing networks -- 1.8.2 Programmable computing networks -- 1.8.3 Microprogramming new instructions -- 2 A system based on the DMC8 microprocessor -- 2.1 The DMC8 microprocessor -- 2.1.1 The internal architecture of the DMC8 processor -- 2.1.2 Memory system structure -- 2.1.3 Bus parts and RAM and ROM memory management -- 2.1.4 Input/output ports -- 2.1.5 DMC8 connection lines -- 2.1.6 DMC8 processor programming model -- 2.1.7 The internal elements of DMC8 processor architecture -- 2.1.8 The sequencer and instruction execution -- 2.1.9 An initial example of programming -- 2.1.10 An example of instruction execution -- 2.2 Bus signals and timing -- 2.2.1 The clock, synchronization and initialization of the system -- 2.2.2 The physical behavior of the bus -- 2.2.3 Clock cycles, machine cycles and instruction cycles -- 2.2.4 The fetch cycle -- 2.2.5 Read/write memory access cycles -- 2.2.6 Input/output access cycles -- 2.2.7 Inactive cycles -- 2.3 Input/output and memory subsystems -- 2.3.1 Memory subsystems -- 2.3.2 The Input/Output subsystem -- 2.4 Introduction to Deeds-McE -- 2.4.1 The microcomputer components of the Deeds-DcS -- 2.4.2 Developing a program -- 2.4.3 Configuring the microcomputer component -- 2.5 Exercises -- 2.5.1 Memory systems -- 2.5.2 Parallel input/output ports -- 2.6 Solutions -- 2.6.1 Memory systems -- 2.6.2 Parallel input/output ports -- 3 Programming the DMC8 -- 3.1 Introduction to assembly language programming -- 3.1.1 Programming languages -- 3.1.2 DMC8 assembly language -- 3.1.3 Constants and variables -- 3.1.4 The EQU directive -- 3.1.5 The ORG directive -- 3.1.6 The DB and DW directives. |
3.2 Addressing modes -- 3.2.1 IMMEDIATE addressing mode (8-bit data) -- 3.2.2 EXTENDED IMMEDIATE addressing mode (16-bit data) -- 3.2.3 DIRECT addressing mode -- 3.2.4 REGISTER INDIRECT addressing mode -- 3.2.5 INDEXED INDIRECT addressing mode -- 3.2.6 REGISTER addressing mode -- 3.2.7 IMPLIED addressing mode -- 3.2.8 BIT addressing mode -- 3.2.9 MODIFIED addressing mode -- 3.3 Types of instructions -- 3.3.1 Data transfer instructions -- 3.3.2 Arithmetic and logic instructions -- 3.3.3 Rotate and shift instructions -- 3.3.4 Bit manipulation instructions -- 3.3.5 Jump instructions -- 3.3.6 CPU control instructions -- 3.3.7 Input/output instructions -- 3.3.8 Subprogram call and return instructions -- 3.4 Subprograms and the Stack area -- 3.4.1 The Stack and the Stack Pointer -- 3.4.2 Subprograms and call and return instructions -- 3.5 Programming examples -- 3.5.1 Emulation of combinational logic -- 3.5.2 Calculating a polynomial -- 3.5.3 Timers -- 3.5.4 Finite state machines -- 3.6 Exercises -- 3.6.1 Emulation of digital components -- 3.6.2 Arithmetic functions -- 3.6.3 Reusable modules and functions -- 3.7 Solutions -- 3.7.1 Emulation of digital components -- 3.7.2 Arithmetic functions -- 3.7.3 Reusable modules and functions -- 4 Interfacing with external devices -- 4.1 Managing communication with external devices -- 4.1.1 The unidirectional handshake -- 4.1.2 The bidirectional handshake -- 4.1.3 More complex handshake types -- |
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4.2 Hardware-supported handshake -- 4.2.1 Example of a parallel interface with hardware handshake -- 4.3 Polling -- 4.4 Interrupt techniques -- 4.4.1 Enabling and disabling interrupts -- 4.4.2 Interrupt mechanisms in detail -- 4.4.3 Example of an interface with an interrupt request -- 4.5 Using vectored interrupts -- 4.5.1 Considerations on recognition and priority -- 4.5.2 Extending to a higher number of devices. |
4.5.3 Example of handling vectored interrupts -- 4.6 Interrupt timers -- 4.6.1 A specialized timer -- 4.6.2 Example of a timer interrupt: blinking lights -- 4.6.3 Timers and concurrent program execution -- 4.7 Examples of programming and interfacing -- 4.7.1 Pulse generator (at system reset) -- 4.7.2 Finite State Machines -- 4.7.3 Sinusoidal waveform generator -- 4.7.4 Dual sinusoidal waveform generator -- 4.7.5 Object counters -- 4.7.6 Sensor evaluation in parallel -- 4.7.7 Push-button interface for a video game -- 4.7.8 Asynchronous serial communication -- 4.8 Exercises -- 4.8.1 Interrupt techniques -- 4.9 Solutions -- 4.9.1 Interrupt techniques -- 5 Microprocessor systems on FPGA -- 5.1 Introduction to FPGAs -- 5.1.1 Creation of prototypes with FPGA -- 5.1.2 Some examples of FPGA boards -- 5.2 The architecture of FPGA components -- 5.2.1 Logic blocks -- 5.2.2 JTAG programming -- 5.2.3 Devices for programming FPGAs -- 5.3 FPGA development tools -- 5.4 The FPGA boards used in the examples -- 5.4.1 The DE2 board -- 5.4.2 The DE0-CV board -- 5.4.3 The EP2C5 board -- 5.5 Microprocessor system prototypes on FPGA -- 5.5.1 The steps to take -- 5.5.2 A system to implement on FPGA: An example -- 5.5.3 Implementing the network on an FPGA board -- 5.5.4 Settings for the DE2 board -- 5.5.5 Settings for the DE0-CV board -- 5.5.6 Settings for the EP2C5 board -- 5.5.7 Converting the Deeds project into VHDL -- 5.5.8 Programming the FPGA board -- 5.6 Project examples -- 5.6.1 Light dimmer -- 5.6.2 LED gadget -- 5.6.3 Special sound effects -- 5.6.4 Music box -- 5.6.5 Stepper motor control -- 5.6.6 Using a liquid crystal display (LCD) -- 5.6.7 LCD stopwatch -- A Memories and busses -- A.1 ROM memory -- A.1.1 A bit of history -- A.1.2 Operating principle -- A.1.3 Internal architecture -- A.2 RAM memory -- A.2.1 Operating principle -- A.2.2 Internal architecture. |
A.3 Bidirectional bus connections -- A.3.1 Tri-state buffers -- A.3.2 Tri-state buffers and busses -- A.3.3 Tri-state memories -- B Programmable computing networks: Schematics and tables -- B.1 The Mp8A computing network -- B.1.1 Table of instructions -- B.1.2 The schematic of the Mp8A computing network -- B.2 The Mp8B computing network -- B.2.1 Table of instructions and the correlated microprograms -- B.2.2 The schematic of the Mp8B computing network -- B.3 The Mp8C computing network -- B.3.1 Table of instructions and the correlated microprograms -- B.3.2 The schematic of the Mp8C computing network -- B.4 The Mp8D computing network -- B.4.1 Table of instructions and the correlated microprograms -- B.4.2 The schematic of the Mp8D computing network -- B.5 The Mp8E computing network -- B.5.1 Table of instructions and the correlated microprograms -- B.5.2 The schematic of the Mp8E computing network -- C DMC8 instruction set tables -- C.1 Data transfer instructions (8-bit) -- C.2 Data transfer instructions (16-bit) -- C.3 Arithmetic and logic instructions (8-bit) -- C.4 Arithmetic instructions (16-bit) -- C.5 Rotate and shift instructions -- C.6 Bit manipulation instructions -- C.7 Jump instructions -- C.8 Subprogram call and return instructions -- C.9 Input/output instructions -- C.10 CPU control instructions. |
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