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Record Nr. |
UNINA9910461503703321 |
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Autore |
Brewer Elizabeth |
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Titolo |
Integrating Study Abroad Into the Curriculum [[electronic resource] ] : Theory and Practice Across the Disciplines |
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Pubbl/distr/stampa |
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Sterling, : Stylus Publishing, 2010 |
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ISBN |
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Descrizione fisica |
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1 online resource (257 p.) |
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Altri autori (Persone) |
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Disciplina |
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Soggetti |
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Foreign study -- Administration -- Handbooks, manuals, etc |
Foreign study -- United States |
Universities and colleges -- Curricula -- United States |
Foreign study - Administration - United States |
Foreign study - Curricula - United States |
Universities and colleges |
Education |
Theory & Practice of Education |
Social Sciences |
Electronic books. |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Description based upon print version of record. |
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Nota di contenuto |
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Cover; CONTENTS; FOREWORD; INTRODUCTION; 1. CAPTURING STUDY ABROAD'S TRANSFORMATIVE POTENTIAL; 2. LESSONS FROM GEOGRAPHY: Mental Maps and Spatial Narratives; 3. PREPARATORY COURSES FOR STUDENTS GOING TO DIVERGENT SITES: Two Examples; 4. CULTURE, RELIGION, AND NATIONALITY: Developing Ethnographic Skills and Reflective Practices Connected to Study Abroad; 5. EMBEDDING PREPARATION IN LANGUAGE COURSES: Bonn and Erlangen; 6. SEMIOTICS AND THE CITY: Putting Theories of Everyday Life, Literature, and Culture Into Practice |
7. COOL CITIES: Kalamazoo and Carthage-The Intersection of Service-Learning and Intercultural Learning8. CHINESE CITIES IN TRANSITION: The City as Classroom; 9. HEALTH AND MICROCREDIT: Beloit as a |
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Laboratory for Understanding Nicaragua; 10. BUILDING GLOBAL AWARENESS THROUGH BIOLOGY, PUBLIC HEALTH, AND STUDY ABROAD: How Science Study Can Prepare Students for Study Abroad, and How Study Abroad Can Prepare Scientists for Citizenship; 11. SYNTHESIS AND CAREER PREPARATION: The International Relations Senior Thesis; 12. CAPACITY BUILDING FOR STUDY ABROAD INTEGRATION: The Institution and the Faculty |
CONTRIBUTORSINDEX; A; B; C; D; E; F; G; H; I; J; K; L; M; N; O; P; R; S; T; U; V; W; Y |
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Sommario/riassunto |
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To achieve the goal of engendering intercultural competence and intellectual development, this book proposes two strategies: structure study abroad to bridge the separation of academic learning from experiential and intercultural learning; and integrate study abroad with the undergraduate curriculum. This book opens with two chapters presenting different theoretical perspectives relevant to the integration of study abroad into the curriculum. The following nine chapters provide examples from a variety of disciplines and within such contexts as distance learning, service learning, and the senio |
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2. |
Record Nr. |
UNINA9910480182803321 |
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Autore |
Wang Laung-Terng |
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Titolo |
Electronic design automation [[electronic resource] ] : synthesis, verification, and test / / edited by Laung-Terng Wang, Yao-Wen Chang, Kwang-Ting (Tim) Cheng |
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Pubbl/distr/stampa |
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Amsterdam, : Morgan Kaufmann/Elsevier, c2009 |
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ISBN |
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1-282-54215-X |
9786612542152 |
0-08-092200-7 |
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Edizione |
[1st edition] |
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Descrizione fisica |
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1 online resource (971 p.) |
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Collana |
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The Morgan Kaufmann series in systems on silicon |
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Altri autori (Persone) |
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WangLaung-Terng |
ChangYao-Wen <1966-> |
ChengKwang-Ting <1961-> |
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Disciplina |
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Soggetti |
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Electronic circuit design - Data processing |
Computer-aided design |
Electronic books. |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Description based upon print version of record. |
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Nota di bibliografia |
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Includes bibliographical references and index. |
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Nota di contenuto |
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Front Cover; Electronic Design Automation: Synthesis, Verification, and Test; Copyright Page; Contents; Preface; In the Classroom; Acknowledgments; Contributors; About the Editors; CHAPTER 1 Introduction; 1.1 Overview of electronic design automation; 1.2 Logic design automation; 1.3 Test automation; 1.4 Physical design automation; 1.5 Concluding remarks; 1.6 Exercises; Acknowledgments; References; CHAPTER 2 Fundamentals of CMOS design; 2.1 Introduction; 2.2 Integrated circuit technology; 2.3 CMOS logic; 2.4 Integrated circuit design techniques; 2.5 CMOS physical design |
2.6 Low-power circuit design techniques2.7 Concluding remarks; 2.8 Exercises; Acknowledgments; References; CHAPTER 3 Design for testability; 3.1 Introduction; 3.2 Testability analysis; 3.3 Scan design; 3.4 Logic built-in self-test; 3.5 Test Compression; 3.6 Concluding remarks; 3.7 Exercises; Acknowledgments; References; CHAPTER 4 Fundamentals of algorithms; 4.1 Introduction; 4.2 Computational complexity; 4.3 Graph algorithms; 4.4 Heuristic algorithms; 4.5 Mathematical programming; 4.6 Concluding remarks; 4.7 Exercises; Acknowledgments; References |
CHAPTER 5 Electronic system-level design and high-level synthesis5.1 Introduction; 5.2 Fundamentals of High-level synthesis; 5.3 High-level synthesis algorithm overview; 5.4 Scheduling; 5.5 Register binding; 5.6 Functional unit binding; 5.7 Concluding remarks; 5.8 Exercises; Acknowledgments; References; CHAPTER 6 Logic synthesis in a nutshell; 6.1 Introduction; 6.2 Data Structures for Boolean representation and reasoning; 6.3 Combinational logic minimization; 6.4 Technology mapping; 6.5 Timing analysis; 6.6 Timing optimization; 6.7 Concluding remarks; 6.8 Exercises; Acknowledgments |
ReferencesCHAPTER 7 Test synthesis; 7.1 Introduction; 7.2 Scan design; 7.3 Logic built-in self-test (BIST) design.; 7.4 RTL Design for testability; 7.5 Concluding remarks; 7.6 Exercises; Acknowledgments; References; CHAPTER 8 Logic and circuit simulation; 8.1 Introduction; 8.2 Logic simulation models; 8.3 Logic simulation techniques; 8.4 Hardware-accelerated logic simulation; 8.5 Circuit simulation models; 8.6 Numerical methods for transient analysis; 8.7 Simulation of VLSI interconnects; 8.8 Simulation of nonlinear devices; 8.9 Concluding remarks; 8.10 Exercises; Acknowledgments; References |
CHAPTER 9 Functional verification9.1 Introduction; 9.2 Verification hierarchy; 9.3 Measuring verification quality; 9.4 Simulation-based approach; 9.5 Formal approaches; 9.6 Advanced research; 9.7 Concluding remarks; 9.8 Exercises; Acknowledgments; References; CHAPTER 10 Floorplanning; 10.1 Introduction; 10.2 Simulated annealing approach; 10.3 Analytical approach; 10.4 Modern floorplanning considerations; 10.5 Concluding remarks; 10.6 Exercises; Acknowledgments; References; CHAPTER 11 Placement; 11.1 Introduction; 11.2 Problem formulations; 11.3 Global placement: partitioning-based approach |
11.4 Global placement: simulated annealing approach |
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Sommario/riassunto |
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This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an ""adjacent"" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits. Anyone who needs |
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to learn the concepts, principles, data structures, algorithms, and architectures of the EDA flow will benefit from this book.Covers complete spectrum of the EDA flow, from ESL design modeling to logic/test synthesis, verific |
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