1.

Record Nr.

UNINA9910455377703321

Titolo

Trends and challenges in aerospace offsets [[electronic resource] ] : proceedings and papers / / Charles W. Wessner, editor ; Board on Science, Technology, and Economic Policy, National Research Council

Pubbl/distr/stampa

Washington, D.C., : National Academy Press, 1999

ISBN

0-309-52416-4

0-585-09007-6

Descrizione fisica

1 online resource (247 p.)

Altri autori (Persone)

WessnerCharles W

Soggetti

Aerospace industries - United States - Costs

Industrial procurement - United States

Offset (Accounting)

Electronic books.

Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Note generali

Description based upon print version of record.

Nota di bibliografia

Includes bibliographical references (p. 229-231).

Nota di contenuto

""Front Matter""; ""Contents""; ""Preface""; ""Acknowledgments""; ""I INTRODUCTION""; ""Introduction""; ""II PROCEEDINGS""; ""Welcome""; ""Symposium Introduction""; ""Opening Remarks""; ""Panel 1 Offsets in Commercial and Military Aerospace: An Overview""; ""Panel 2 The Policy Context for Military Aerospace Offsets""; ""Panel 3 The Effect of Offsets, Outsourcing, and Foreign Competition on Output and Employment in the U.S. Aerospace Industry""; ""Panel 4 Offsets in the International Marketplace: An Aerospace Industry View""

""Panel 5 Dual-Use Supplier Management and Strategic International Sourcing in Aircraft Manufacturing""""Emerging Challenges and Diverging Interests Panel 6""; ""Panel 7 The Role of the U.S. Government in Setting Offset Policy""; ""III PAPERS""; ""Offsets in Commercial and Military Aerospace: An Overview""; ""The Policy Context for Military Aerospace Offsets""; ""The Effects of Offsets, Outsourcing, and Foreign Competition on Output and Employment in the U.S. Aerospace Industry""; ""Offsets in the International Marketplace: An Aerospace Industry View""

""Dual-Use Supplier Management and Strategic International Sourcing



in Aircraft Manufacturing""""The Role of the United States Government in Setting Offset Policy""; ""IV ANNEXES""; ""Defense Industry Offset Association Position on Offset Issues""; ""Participants""; ""Selected Bibliography""

2.

Record Nr.

UNINA9910337620903321

Autore

Taraate Vaibbhav

Titolo

Advanced HDL Synthesis and SOC Prototyping : RTL Design Using Verilog / / by Vaibbhav Taraate

Pubbl/distr/stampa

Singapore : , : Springer Singapore : , : Imprint : Springer, , 2019

ISBN

981-10-8776-8

Edizione

[1st ed. 2019.]

Descrizione fisica

1 online resource (xxi, 307 pages)

Disciplina

621.3815

Soggetti

Electronic circuits

Microprogramming

Logic design

Circuits and Systems

Control Structures and Microprogramming

Logic Design

Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Nota di contenuto

Introduction -- SOC Design -- RTL Design Guidelines -- RTL Design and Verification -- Processor cores and Architecture design -- Buses and protocols in SOC designs -- DSP Algorithms and Video Processing -- ASIC and FPGA Synthesis -- Static Timing Analysis -- SOC Prototyping -- SOC Prototyping guidelines -- Design Integration and SOC synthesis -- Interconnect delays and Timing -- SOC Prototyping and debug techniques -- Testing at the board level.

Sommario/riassunto

This book describes RTL design using Verilog, synthesis and timing closure for System On Chip (SOC) design blocks. It covers the complex RTL design scenarios and challenges for SOC designs and provides practical information on performance improvements in SOC, as well as Application Specific Integrated Circuit (ASIC) designs. Prototyping using modern high density Field Programmable Gate Arrays (FPGAs) is



discussed in this book with the practical examples and case studies. The book discusses SOC design, performance improvement techniques, testing and system level verification, while also describing the modern Intel FPGA/XILINX FPGA architectures and their use in SOC prototyping. Further, the book covers the Synopsys Design Compiler (DC) and Prime Time (PT) commands, and how they can be used to optimize complex ASIC/SOC designs. The contents of this book will be useful to students and professionals alike.