1.

Record Nr.

UNINA9910438038403321

Autore

Ogras Umit Y

Titolo

Modeling, analysis and optimization of network-on-chip communication architectures / / Umit Y. Ogras, Radu Marculescu

Pubbl/distr/stampa

Dordrecht [Netherlands] : , : Springer, , 2013

ISBN

1-299-40803-6

94-007-3958-3

Edizione

[1st ed. 2013.]

Descrizione fisica

1 online resource (xiv, 174 pages) : illustrations (some color)

Collana

Lecture Notes in Electrical Engineering, , 1876-1100 ; ; 184

Disciplina

621.3815

Soggetti

Networks on a chip

Routers (Computer networks)

Computer architecture - Mathematical models

Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Note generali

"ISSN: 1876-1100."

Nota di bibliografia

Includes bibliographical references and index.

Nota di contenuto

Introduction -- Literature Survey -- Motivational Example: MPEG-2 Encoder Design -- Target NoC Platform -- NoCPerformance Analysis -- Application-specific NoC Architecture Custimization using Long-range Links -- Analysis and Optimization of Prediction-based Flow Control in Networks-on-Chip -- Design and Management of VFI Partition Networks-on-Chip -- Conclusion -- Bibliography -- Appendix A. Tools and FPGA prototype -- Appendix B. Experiments using the Single-chip Cloud Computer (SCC) Platform.

Sommario/riassunto

Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures. This book explores outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design



methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.