| |
|
|
|
|
|
|
|
|
1. |
Record Nr. |
UNINA9910349402203321 |
|
|
Titolo |
Automated Technology for Verification and Analysis : 16th International Symposium, ATVA 2018, Los Angeles, CA, USA, October 7-10, 2018, Proceedings / / edited by Shuvendu K. Lahiri, Chao Wang |
|
|
|
|
|
|
|
Pubbl/distr/stampa |
|
|
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018 |
|
|
|
|
|
|
|
|
|
ISBN |
|
|
|
|
|
|
Edizione |
[1st ed. 2018.] |
|
|
|
|
|
Descrizione fisica |
|
1 online resource (XIII, 560 p. 133 illus.) |
|
|
|
|
|
|
Collana |
|
Programming and Software Engineering ; ; 11138 |
|
|
|
|
|
|
Disciplina |
|
|
|
|
|
|
|
|
Soggetti |
|
Software engineering |
Programming languages (Electronic computers) |
Computer security |
Computer simulation |
Computer logic |
Mathematical logic |
Software Engineering |
Programming Languages, Compilers, Interpreters |
Systems and Data Security |
Simulation and Modeling |
Logics and Meanings of Programs |
Mathematical Logic and Formal Languages |
|
|
|
|
|
|
|
|
Lingua di pubblicazione |
|
|
|
|
|
|
Formato |
Materiale a stampa |
|
|
|
|
|
Livello bibliografico |
Monografia |
|
|
|
|
|
Note generali |
|
|
|
|
|
|
Nota di contenuto |
|
Formal Methods -- Verification -- Program Synthesis -- Model Checking -- Theorem Proving -- Software Verification -- SAT Solver -- SMT Solver -- Automation Logic. |
|
|
|
|
|
|
|
|
Sommario/riassunto |
|
This book constitutes the refereed proceedings of the 16th International Symposium on Automated Technology for Verification and Analysis, ATVA 2018, held in Los Angeles, CA, USA in October 2018. The 27 full papers presented together with 5 short papers and 3 invited talks were carefully reviewed and selected from 82 submissions. The |
|
|
|
|
|
|
|
|
|
|
symposium is dedicated to the promotion of research on theoretical and practical aspects of automated analysis, verification and synthesis by providing a forum for interaction between the regional and the international research communities and industry in the field. |
|
|
|
|
|
| |