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Record Nr. |
UNINA9910299860203321 |
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Autore |
Zhao Feng |
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Titolo |
Low-Noise Low-Power Design for Phase-Locked Loops : Multi-Phase High-Performance Oscillators / / by Feng Zhao, Fa Foster Dai |
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Pubbl/distr/stampa |
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Cham : , : Springer International Publishing : , : Imprint : Springer, , 2015 |
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ISBN |
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Edizione |
[1st ed. 2015.] |
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Descrizione fisica |
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1 online resource (106 p.) |
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Disciplina |
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620 |
621.381 |
621.3815 |
621.382 |
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Soggetti |
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Electronic circuits |
Electronics |
Microelectronics |
Signal processing |
Image processing |
Speech processing systems |
Circuits and Systems |
Electronics and Microelectronics, Instrumentation |
Signal, Image and Speech Processing |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Description based upon print version of record. |
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Nota di contenuto |
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Introduction -- Analysis of Quantization Noise Reduction Techniques for Fractional-N PLL -- A Wide-Band 0.13µm SiGe BiCMOS PLL for X-Band Radar -- Design and Analysis of QVCO with Different Coupling Techniques -- Design and Analysis of a 0.6V QVCO with Capacitive-Coupling Technique -- Conclusions. |
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Sommario/riassunto |
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This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation. The capacitive-coupling technique has been validated |
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