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1. |
Record Nr. |
UNINA9910637195503321 |
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Autore |
Migne J.-P (Jacques-Paul), <1800-1875> |
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Titolo |
Patrologiae Cursus Completus, sive bibliotheca universalis ... omnium S.S. Patrum, Doctorum, Scriptorumque ecclesiasticorum qui ab aevo apostolico ad Innocentii III tempora floruerunt ... Series Prima, . Patrologiae Tomus LIX [[electronic resource]] |
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Pubbl/distr/stampa |
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Ann Arbor, Michigan : , : ProQuest LLC, , 1996 |
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Descrizione fisica |
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Soggetti |
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Christian literature, Early - Latin authors |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Nota di contenuto |
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Contains works by : S. Gelasius I Papa ; S. Avitus ; S. Faustinus ; Joannes Diaconus ; Julianus Pomerius ; duo anonymi ; Aurelius Prudentius [Tomus prior]. |
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2. |
Record Nr. |
UNINA9910299814803321 |
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Autore |
Lin Yu |
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Titolo |
Power-Efficient High-Speed Parallel-Sampling ADCs for Broadband Multi-carrier Systems / / by Yu Lin, Hans Hegt, Kostas Doris, Arthur H.M. van Roermund |
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Pubbl/distr/stampa |
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Cham : , : Springer International Publishing : , : Imprint : Springer, , 2015 |
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ISBN |
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Edizione |
[1st ed. 2015.] |
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Descrizione fisica |
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1 online resource (124 p.) |
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Collana |
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Analog Circuits and Signal Processing, , 1872-082X |
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Disciplina |
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Soggetti |
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Electronic circuits |
Electronics |
Microelectronics |
Circuits and Systems |
Electronics and Microelectronics, Instrumentation |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Description based upon print version of record. |
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Nota di bibliografia |
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Includes bibliographical references. |
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Nota di contenuto |
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Introduction -- Enhancing ADC performance by exploiting signal properties -- Parallel-sampling ADC architecture for mult-carrier signals -- Implementations of the parallel-sampling ADC architecture -- Conclusions and recommendations. |
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Sommario/riassunto |
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This book addresses the challenges of designing high performance analog-to-digital converters (ADCs) based on the “smart data converters” concept, which implies context awareness, on-chip intelligence and adaptation. Readers will learn to exploit various information either a-priori or a-posteriori (obtained from devices, signals, applications or the ambient situations, etc.) for circuit and architecture optimization during the design phase or adaptation during operation, to enhance data converters performance, flexibility, robustness and power-efficiency. The authors focus on exploiting the a-priori knowledge of the system/application to develop enhancement techniques for ADCs, with particular emphasis on improving the power |
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efficiency of high-speed and high-resolution ADCs for broadband multi-carrier systems. |
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