1.

Record Nr.

UNINA9910299676903321

Autore

Suryadevara Nagender Kumar

Titolo

Smart Homes : Design, Implementation and Issues / / by Nagender Kumar Suryadevara, Subhas Chandra Mukhopadhyay

Pubbl/distr/stampa

Cham : , : Springer International Publishing : , : Imprint : Springer, , 2015

ISBN

9783319135571

3319135570

Edizione

[1st ed. 2015.]

Descrizione fisica

1 online resource (184 p.)

Collana

Smart Sensors, Measurement and Instrumentation, , 2194-8402 ; ; 14

Disciplina

004.68

Soggetti

Computational intelligence

Signal processing

Image processing

Speech processing systems

Artificial intelligence

Electronics

Microelectronics

Geriatrics

Computational Intelligence

Signal, Image and Speech Processing

Artificial Intelligence

Electronics and Microelectronics, Instrumentation

Geriatrics/Gerontology

Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Note generali

Description based upon print version of record.

Nota di bibliografia

Includes bibliographical references.

Nota di contenuto

Introduction -- Smart Home related Research -- Design and Deployment of WSN in a Home Environment and Real-Time Data Fusion -- ADLs Recognition of an Elderly person and Wellness Determination -- Forecasting the Behaviour of an Elderly Person Using WSN Data -- Sensor Activity Pattern (SAP) Matching Process and Outlier Detection -- Conclusion and Future Works.

Sommario/riassunto

The book addresses issues towards the design and development of Wireless Sensor Network based Smart Home and fusion of Real-Time



Data for Wellness Determination of an elderly person living alone in a Smart Home. The fundamentals of selection of sensor, fusion of sensor data, system design, modelling, characterizations, experimental investigations and analyses have been covered. This book will be extremely useful for the engineers and researchers especially higher undergraduate, postgraduate students as well as practitioners working on the development of Wireless Sensor Networks, Internet of Things and Data Mining.

2.

Record Nr.

UNINA9910482972503321

Titolo

Cryptographic Hardware and Embedded Systems - CHES 2009 : 11th International Workshop Lausanne, Switzerland, September 6-9, 2009 Proceedings / / edited by Christophe Clavier, Kris Gaj

Pubbl/distr/stampa

Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2009

ISBN

3-642-04138-8

Edizione

[1st ed. 2009.]

Descrizione fisica

1 online resource (XVI, 472 p.)

Collana

Security and Cryptology, , 2946-1863 ; ; 5747

Classificazione

DAT 130f

DAT 260f

DAT 465f

SS 4800

Altri autori (Persone)

ClavierChristophe

GajKris

Disciplina

005.8/2

Soggetti

Cryptography

Data encryption (Computer science)

Coding theory

Information theory

Data structures (Computer science)

Data protection

Algorithms

Computer science - Mathematics

Cryptology

Coding and Information Theory

Data Structures and Information Theory

Data and Information Security

Symbolic and Algebraic Manipulation



Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Note generali

Bibliographic Level Mode of Issuance: Monograph

Nota di bibliografia

Includes bibliographical references and index.

Nota di contenuto

Software Implementations -- Faster and Timing-Attack Resistant AES-GCM -- Accelerating AES with Vector Permute Instructions -- SSE Implementation of Multivariate PKCs on Modern x86 CPUs -- MicroEliece: McEliece for Embedded Devices -- Invited Talk 1 -- Physical Unclonable Functions and Secure Processors -- Side Channel Analysis of Secret Key Cryptosystems -- Practical Electromagnetic Template Attack on HMAC -- First-Order Side-Channel Attacks on the Permutation Tables Countermeasure -- Algebraic Side-Channel Attacks on the AES: Why Time also Matters in DPA -- Differential Cluster Analysis -- Side Channel Analysis of Public Key Cryptosystems -- Known–Plaintext–Only Attack on RSA–CRT with Montgomery Multiplication -- A New Side-Channel Attack on RSA Prime Generation -- Side Channel and Fault Analysis Countermeasures -- An Efficient Method for Random Delay Generation in Embedded Software -- Higher-Order Masking and Shuffling for Software Implementations of Block Ciphers -- A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques -- A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions -- Invited Talk 2 -- Crypto Engineering: Some History and Some Case Studies -- Pairing-Based Cryptography -- Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers -- Faster -Arithmetic for Cryptographic Pairings on Barreto-Naehrig Curves -- Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves -- New Ciphers and Efficient Implementations -- KATAN and KTANTAN — A Family of Small and Efficient Hardware-Oriented Block Ciphers -- Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security -- Elliptic Curve Scalar Multiplication Combining Yao’s Algorithm and Double Bases -- TRNGs and Device Identification -- The Frequency Injection Attack on Ring-Oscillator-Based True Random Number Generators -- Low-Overhead Implementation of a Soft Decision Helper Data Algorithm for SRAM PUFs -- CDs Have Fingerprints Too -- Invited Talk 3 -- The State-of-the-Art in IC Reverse Engineering -- Hot Topic Session: Hardware Trojans and Trusted ICs -- Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering -- MERO: A Statistical Approach for Hardware Trojan Detection -- Theoretical Aspects -- On Tamper-Resistance from a Theoretical Viewpoint -- Mutual Information Analysis: How, When and Why? -- Fault Analysis -- Fault Attacks on RSA Signatures with Partially Unknown Messages -- Differential Fault Analysis on DES Middle Rounds.

Sommario/riassunto

This book constitutes the refereed proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2009, held in Lausanne, Switzerland during September 6-9, 2009. The book contains 3 invited talks and 29 revised full papers which were carefully reviewed and selected from 148 submissions. The papers are organized in topical sections on software implementations, side channel analysis of secret key cryptosystems, side channel analysis of public key cryptosystems, side channel and fault analysis countermeasures, pairing-based cryptography, new ciphers and efficient implementations, TRNGs and device identification, hardware



trojans and trusted ICs, theoretical aspects, and fault analysis.