1.

Record Nr.

UNINA9910298978603321

Autore

Biedermann Alexander

Titolo

Design Concepts for a Virtualizable Embedded MPSoC Architecture : Enabling Virtualization in Embedded Multi-Processor Systems / / by Alexander Biedermann

Pubbl/distr/stampa

Wiesbaden : , : Springer Fachmedien Wiesbaden : , : Imprint : Springer Vieweg, , 2014

ISBN

3-658-08047-7

Edizione

[1st ed. 2014.]

Descrizione fisica

1 online resource (222 p.)

Disciplina

004

004.6

005.1

Soggetti

Computer hardware

Computer organization

Software engineering

Computer Hardware

Computer Systems Organization and Communication Networks

Software Engineering/Programming and Operating Systems

Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Note generali

"Research"--Cover.

Nota di bibliografia

Includes bibliographical references.

Nota di contenuto

The “Nulticore” Dilemma -- Virtualizable Architecture for embedded MPSoC -- The Virtualizable MPSoC: Requirements, Concepts, and Design Flows -- Application Scenarios -- Conclusion and Outlook.

Sommario/riassunto

Alexander Biedermann presents a generic hardware-based virtualization approach, which may transform an array of any off-the-shelf embedded processors into a multi-processor system with high execution dynamism. Based on this approach, he highlights concepts for the design of energy aware systems, self-healing systems as well as parallelized systems. For the latter, the novel so-called Agile Processing scheme is introduced by the author, which enables a seamless transition between sequential and parallel execution schemes. The design of such virtualizable systems is further aided by introduction of a dedicated design framework, which integrates into existing, commercial workflows. As a result, this book provides



comprehensive design flows for the design of embedded multi-processor systems-on-chip. Contents Virtualization for Embedded Processors Generic Virtualization Layer for Multi-Processor Systems-on-Chip Design Flow for Self-Healing Systems Design Flow for Agile Processing Systems Target Groups Scientists and students in the field of embedded systems, especially reconfigurable systems Engineers in the field of embedded HW/SW systems, such as in the automotive domain About the Author Alexander Biedermann completed his doctoral thesis at the Integrated Circuits and Systems Lab, Technische Universität Darmstadt, and at the Center for Advanced Security Research Darmstadt (CASED) under supervision of Prof. Dr.-Ing. Sorin A. Huss.