PLD Based Design with VHDL : RTL Design, Synthesis and Implementation / / by Vaibbhav Taraate

• Record Nr.: UNINA9910254168703321
• Autore: Taraate Vaibbhav
• Pubbl/distr/stampa: Singapore : , : Springer Singapore : , : Imprint : Springer, , 2017
• ISBN: 981-10-3296-3
• Edizione: [1st ed. 2017.]
• Descrizione fisica: 1 online resource (XXI, 423 p. 246 illus.)
• Disciplina: 621.3815
• Soggetti: Electronic circuits; Electronics; Microelectronics; Microprogramming; Circuits and Systems; Electronics and Microelectronics, Instrumentation; Control Structures and Microprogramming
• Lingua di pubblicazione: Inglese
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Note generali: Includes index.
• Nota di contenuto: Introduction to HDL -- Basic Logic Circuits and VHDL Description -- VHDL and Key Important Constructs -- 4 Combinational Logic Design Using VHDL Constructs -- Sequential Logic Design -- Introduction to PLD -- Design and simulation using VHDL constructs -- PLD Based Design Guidelines -- Finite State Machines -- Synthesis Optimization using VHDL -- Design Implementation Using Xilinx Vivado.
• Sommario/riassunto: This book covers basic fundamentals of logic design and advanced RTL design concepts using VHDL. The book is organized to describe both simple and complex RTL design scenarios using VHDL. It gives practical information on the issues in ASIC prototyping using FPGAs, design challenges and how to overcome practical issues and concerns. It describes how to write an efficient RTL code using VHDL and how to improve the design performance. The design guidelines by using VHDL are also explained with the practical examples in this book. The book also covers the ALTERA and XILINX FPGA architecture and the design flow for the PLDs. The contents of this book will be useful to students, researchers, and professionals working in hardware design and ; optimization. The book can also be used as a text for graduate and professional development courses.