1.

Record Nr.

UNINA9910253965703321

Autore

Sayil Selahattin

Titolo

Soft Error Mechanisms, Modeling and Mitigation / / by Selahattin Sayil

Pubbl/distr/stampa

Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016

ISBN

3-319-30607-3

Edizione

[1st ed. 2016.]

Descrizione fisica

1 online resource (112 p.)

Disciplina

620

Soggetti

Electronic circuits

Microprocessors

Computer architecture

Electronic Circuits and Systems

Processor Architectures

Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Note generali

Includes index.

Nota di contenuto

Introduction -- Mitigation of Single Event Effects -- Transmission Gate (TG) Based Soft Error Mitigation Methods -- Single Event Soft Error Mechanisms -- Modeling Single Event Crosstalk Noise in Nanometer Technologies -- Modeling of Single Event Coupling Delay and Speedup Effects -- Single Event Upset Hardening of Interconnects -- Soft-Error Aware Power Optimization -- Dynamic Threshold Technique for Soft Error and Soft Delay Mitigation.

Sommario/riassunto

This book introduces readers to various radiation soft-error mechanisms such as soft delays, radiation induced clock jitter and pulses, and single event (SE) coupling induced effects. In addition to discussing various radiation hardening techniques for combinational logic, the author also describes new mitigation strategies targeting commercial designs. Coverage includes novel soft error mitigation techniques such as the Dynamic Threshold Technique and Soft Error Filtering based on Transmission gate with varied gate and body bias. The discussion also includes modeling of SE crosstalk noise, delay and speed-up effects. Various mitigation strategies to eliminate SE coupling effects are also introduced. Coverage also includes the reliability of low power energy-efficient designs and the impact of leakage power



consumption optimizations on soft error robustness. The author presents an analysis of various power optimization techniques, enabling readers to make design choices that reduce static power consumption and improve soft error reliability at the same time. .