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Record Nr. |
UNINA9910166633803321 |
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Titolo |
System level ESD co-design / / edited by Charvaka Duvvury, Harald Gossner |
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Pubbl/distr/stampa |
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West Sussex, England : , : Wiley-IEEE Press, , 2015 |
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©2015 |
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ISBN |
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1-118-86188-4 |
1-118-86184-1 |
9781118861899 |
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Descrizione fisica |
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1 online resource (533 p.) |
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Collana |
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Classificazione |
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Disciplina |
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Soggetti |
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Shielding (Electricity) |
Electronic apparatus and appliances - Design and construction |
Integrated circuits - Design and construction |
Integrated circuits - Protection |
Electrostatics |
Static eliminators |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Description based upon print version of record. |
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Nota di bibliografia |
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Includes bibliographical references and index. |
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Nota di contenuto |
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Machine generated contents note: Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C. Dunnihoo Index . |
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Sommario/riassunto |
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"Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. |
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