Logically determined design [[electronic resource] ] : clockless system design with NULL convention logic / / Karl M. Fant

• Record Nr.: UNINA9910146070003321
• Autore: Fant Karl M
• Pubbl/distr/stampa: Hoboken, NJ, : John Wiley & Sons, 2005
• ISBN: 1-280-25243-X; 9786610252435; 0-470-32394-9; 0-471-70287-0; 0-471-70289-7
• Edizione: [1st edition]
• Descrizione fisica: 1 online resource (310 p.)
• Disciplina: 621.381
• Soggetti: Asynchronous circuits - Design and construction; Logic, Symbolic and mathematical; Logic design; Computer architecture
• Lingua di pubblicazione: Inglese
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Note generali: "A John Wiley and Sons, Inc. publication."
• Nota di bibliografia: Includes bibliographical references (p. 285-288) and index.
• Nota di contenuto: LOGICALLY DETERMINED DESIGN; CONTENTS; Preface; Acknowledgments; 1. Trusting Logic; 1.1 Mathematicianless Enlivenment of Logic Expression; 1.2 Emulating the Mathematician; 1.3 Supplementing the Expressivity of Boolean Logic; 1.3.1 The Expressional Insufficiency of Boolean Logic; 1.3.2 Supplementing the Logical Expression; 1.3.3 Coordinating Combinational Expressions; 1.3.4 The Complexity Burden of the Time Interval; 1.3.5 Forms of Supplementation Other Than the Time Interval; 1.3.6 The Complexity Burden of Asynchronous Design; 1.3.7 The Cost of Supplementation; 1.4 Defining a Sufficiently Expressive Logic1.4.1 Logically Expressing Data Presentation Boundaries; 1.4.2 Logically Recognizing Data Presentation Boundaries; 1.4.3 Logically Coordinating the Flow of Data; 1.4.4 Mathematicianless Completeness of Expression; 1.5 The Logically Determined System; 1.6 Trusting the Logic: A Methodology of Logical Confidence; 1.7 Summary; 1.8 Exercises; 2. A Sufficiently Expressive Logic; 2.1 Searching for a New Logic; 2.1.1 Expressing Discrete Data ; Presentation Boundaries; 2.1.2 Logically Recognizing Discrete Data Presentation Boundaries; 2.1.3 The Universality of the NULL Function2.1.4 Bounding the Behavior of a Combinational Expression; 2.1.5 Relationship of 4NCL to Boolean Logic; 2.2 Deriving a 3 Value Logic; 2.2.1 Expressing 3NCL State-holding Behavior; 2.2.2 3NCL Summary; 2.3 Deriving a 2 Value Logic; 2.3.1 The Data Differentiation Convention; 2.3.2 2NCL as a Threshold Logic; 2.3.3 2NCL in Relation to Boolean Logic; 2.3.4 Subvariable Expressivity; 2.3.5 Completeness at the Variable Level; 2.3.6 The 2NCL Orphan Path; 2.3.7 2NCL Summary; 2.4 Compromising Logical Completeness; 2.4.1 Moving Logically Determined Completeness Boundaries Farther Apart2.4.2 No Logically Determined Boundaries in Data Path; 2.4.3 No Logically Determined Boundaries at All; 2.5 Summary; 3. The Structure of Logically Determined Systems; 3.1 The Cycle; 3.1.1 The Ring Oscillator; 3.1.2 Oscillator Composition with Shared Completeness Path; 3.1.3 Cycles and 2NCL Data Paths; 3.1.4 Data Path Abstraction; 3.1.5 Composition in Terms of Cycles; 3.1.6 Composition in Terms of Registration Stages; 3.2 Basic Pipeline Structures; 3.2.1 Pipeline Fan-out; 3.2.2 Pipeline Fan-in; 3.2.3 The Pipeline Ring; 3.2.4 Cycle Structure Example3.3 Control Variables and Wavefront Steering; 3.3.1 Steering Control Variables; 3.3.2 Fan-out Wavefront Steering; 3.3.3 Fan-in Wavefront Steering; 3.3.4 Wavefront Steering Philosophy; 3.3.5 Concurrent Pipelined Function Paths; 3.4 The Logically Determined System; 3.4.1 Managing Wavefront Interaction; 3.4.2 A Simple Example System; 3.5 Initialization; 3.5.1 Initializing the System; 3.5.2 Initializing Data Wavefronts; 3.6 Testing; 3.7 Summary; 3.8 Exercises; 4. 2NCL Combinational Expression; 4.1 Function Classification; 4.1.1 Threshold Function Classification; 4.1.2 Boolean Function Classification
• Sommario/riassunto: This seminal book presents a new logically determined design methodology for designing clockless circuit systems. The book presents the foundations, architectures and methodologies to implement such systems. Based on logical relationships, it concentrates on digital circuit system complexity and productivity to allow for more reliable, faster and cheaper products.* Transcends shortcomings of Boolean logic.* Presents theoretical foundations, architecture and analysis of clockless (asynchronous) circuit design.* Contains examples and exercises making it ideal for those studying the a