1.

Record Nr.

UNINA9910451752203321

Titolo

Assessment of the performance of engineered waste containment barriers [[electronic resource] /] / Committee to Assess the Performance of Engineered Barriers, Board on Earth Sciences and Resources, Division on Earth and Life Studies, National Research Council of the National Academies

Pubbl/distr/stampa

Washington, D.C., : National Academies Press, c2007

ISBN

1-280-96907-5

9786610969074

0-309-10810-1

Descrizione fisica

1 online resource (135 p.)

Disciplina

363.72

Soggetti

Engineered barrier systems (Waste disposal)

Sanitary landfills - Linings

Waste disposal in the ground - Environmental aspects - United States

Waste disposal sites - Design and construction

Low level radioactive waste disposal facilities - Design and construction

Hazardous waste sites - Design and construction

Electronic books.

Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Note generali

Description based upon print version of record.

Nota di bibliografia

Includes bibliographical references (p. 99-109).

Nota di contenuto

""Front Matter""; ""Preface""; ""Acknowledgments""; ""Contents""; ""Summary""; ""1 Introduction""; ""2 Overview of Engineered Barrier Systems""; ""3 Monitoring Barrier Performance""; ""4 Performance of Barrier System Components""; ""5 Containment System Performance""; ""6 Summary and Recommendations""; ""References""; ""Appendixes""; ""Appendix A: Predicting Human Health and Ecological Impacts""; ""Appendix B: Methods for Monitoring Engineered Barrier Performance""; ""Appendix C: Construction Quality Assurance Monitoring Techniques""; ""Appendix D: Biographical Sketches of Committee Members""

""Acronyms and Abbreviations""



2.

Record Nr.

UNINA9910141368203321

Autore

Lipiansky Ed

Titolo

Electrical, electronics, and digital hardware essentials for scientists and engineers / / Ed Lipiansky

Pubbl/distr/stampa

Hoboken, New Jersey : , : Wiley, , 2012

[Piscataqay, New Jersey] : , : IEEE Xplore, , [2013]

ISBN

1-118-41454-3

1-283-83507-X

1-118-41452-7

Descrizione fisica

1 online resource (665 p.)

Collana

IEEE press series on microelectronic systems ; ; 26

Classificazione

TEC008010

Disciplina

621.381

Soggetti

Electronic circuits

Electronic apparatus and appliances

Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Note generali

Includes index.

Nota di contenuto

Preface xvii -- About the Author xix -- 1 From the Bottom Up: Voltages, Currents, and Electrical Components 1 -- 1.1 An Introduction to Electric Charges and Atoms 1 -- 1.2 Electric DC Voltage and Current Sources 3 -- 1.3 Electric Components: Resistors, Inductors, and Capacitors 12 -- 1.4 Ohm's Law, Power Delivered and Power Consumed 25 -- 1.5 Capacitors 33 -- 1.6 Inductors 44 -- 1.7 Kirchhoff's Voltage Law (KVL) and Kirchhoff's Current Law (KCL) 73 -- 1.8 Summary 87 -- 2 Alternating Current Circuits 98 -- 2.1 AC Voltage and Current Sources, Root Mean Square Values (RMS), and Power 98 -- 2.2 Sinusoidal Steady State: Time and Frequency Domains 111 -- 2.3 Time Domain Equations: Frequency Domain Impedance and Phasors 123 -- 2.4 Power in AC Circuits 136 -- 2.5 Dependent Voltage and Current Sources 145 -- 2.6 Summary of Key Points 149 -- 3 Circuit Theorems and Methods of Circuit Analysis 155 -- 3.1 Introduction 155 -- 3.2 The Superposition Method 156 -- 3.3 The Thévenin Method 165 -- 3.4 Norton's Method 172 -- 3.5 The Mesh Method of Analysis 179 -- 3.6 The Nodal Method of Analysis 199 -- 3.7 Which One Is the Best Method? 210 -- 3.8 Using all the Methods 213 -- 3.9 Summary and Conclusions 225 -- 4 First- and Second-Order Circuits under



Sinusoidal and Step Excitations 233 -- 4.1 Introduction 233 -- 4.2 The First-Order RC Low-Pass Filter (LPF) 235 -- 4.3 The First-Order RC High-Pass Filter (HPF) 252 -- 4.4 Second-Order Circuits 265 -- 4.5 Series RLC Second-Order Circuit 266 -- 4.6 Second-Order Circuit in Sinusoidal Steady State: Bode Plots 275 -- 4.7 Drawing the Second-Order Bode Plots Using Asymptotic Approximations 278 -- 4.8 Summary 279 -- 5 The Operational Amplifi er as a Circuit Element 287 -- 5.1 Introduction to the Operational Amplifier 287 -- 5.2 Ideal and Real Op Amps 288 -- 5.3 Brief Defi nition of Linear Amplifiers 290 -- 5.4 Linear Applications of Op Amps 294 -- 5.5 Op Amps Nonlinear Applications 331 -- 5.6 Operational Amplifi ers Nonidealities 341 -- 5.7 Op Amp Selection Criteria 343.

5.8 Summary 347 -- 6 Electronic Devices: Diodes, BJTs, and MOSFETs 354 -- 6.1 Introduction to Electronic Devices 354 -- 6.2 The Ideal Diode 355 -- 6.3 Bipolar Junction Transistors (BJT) 374 -- 6.4 Metal Oxide Field Effect Transistor (MOSFET) 420 -- 6.5 Summary 443 -- 7 Combinational Circuits 456 -- 7.1 Introduction to Digital Circuits 456 -- 7.2 Binary Numbers: a Quick Introduction 456 -- 7.3 Boolean Algebra 460 -- 7.4 Minterms: Standard or Canonical Sum of Products (SOP) Form 467 -- 7.5 Maxterms: Standard or Canonical Product of Sums (POS) Form 472 -- 7.6 Karnaugh Maps and Design Examples 473 -- 7.7 Product of Sums Simplifi cations 490 -- 7.8 Don't Care Conditions 491 -- 7.9 Logic Gates: Electrical and Timing Characteristics 495 -- 7.10 Summary 500 -- 8 Digital Design Building Blocks and More Advanced Combinational Circuits 503 -- 8.1 Combinational Circuits with More than One Output 503 -- 8.2 Decoders and Encoders 510 -- 8.3 Multiplexers and Demultiplexers (MUXes and DEMUXes) 519 -- 8.4 Signed and Unsigned Binary Numbers 527 -- 8.5 Arithmetic Circuits: Half-Adders (HA) and Full-Adders (FA) 533 -- 8.6 Carry Look Ahead (CLA) or Fast Carry Generation 543 -- 8.7 Some Short-Hand Notation for Large Logic Blocks 546 -- 8.8 Summary 547 -- 9 Sequential Logic and State Machines 550 -- 9.1 Introduction 550 -- 9.2 Latches and Flip-Flops (FF) 552 -- 9.3 Timing Characteristics of Sequential Elements 571 -- 9.4 Simple State Machines 574 -- 9.5 Synchronous State Machines General Considerations 592 -- 9.6 Summary 599 -- 10 A Simple CPU Design 603 -- 10.1 Our Simple CPU Instruction Set 603 -- 10.2 Instruction Set Details: Register Transfer Language (RTL) 605 -- 10.3 Building a Simple CPU: A Bottom-Up Approach 607 -- 10.4 Data Path Architecture: Putting the Logic Blocks Together 615 -- 10.5 The Simple CPU Controller 620 -- 10.6 CPU Timing Requirements 626 -- 10.7 Other System Pieces: Clock, Reset and Power Decoupling 628 -- 10.8 Summary 633 -- Further Reading 633 -- Problems 633 -- Index 637.

Sommario/riassunto

"In order for all components of electric circuits to function flawlessly, electric device engineers need to be able to test, evaluate, and problem-solve the circuit board as a whole. Written by an expert with 25 years of working experience in Silicon Valley, this practical book walks readers through a wide variety of circuit analysis methods, discussing the pros and cons for each method, and how to evaluate it and solve everyday circuit analysis problems. Both basic and advanced tools are covered, along with trouble-shooting tips, practical examples, and numerous illustrations to facilitate comprehension"--