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1. |
Record Nr. |
UNINA9910133236203321 |
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Autore |
Ceserani Remo <1933-> |
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Titolo |
Lo straniero / / Remo Ceserani |
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Pubbl/distr/stampa |
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Roma [etc.], : Laterza, 1998 |
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ISBN |
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Descrizione fisica |
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Collana |
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Alfabeto letterario ; ; 1 |
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Disciplina |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Essay on the stranger in literary works. |
R. Ceserani teaches at the University of Bologna. |
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Nota di bibliografia |
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Includes bibliographical references. |
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2. |
Record Nr. |
UNINA9910136015103321 |
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Titolo |
Designing with Xilinx® FPGAs : Using Vivado / / edited by Sanjay Churiwala |
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Pubbl/distr/stampa |
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Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 |
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ISBN |
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Edizione |
[1st ed. 2017.] |
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Descrizione fisica |
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1 online resource (X, 260 p. 141 illus., 3 illus. in color.) |
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Disciplina |
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Soggetti |
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Electronic circuits |
Microprocessors |
Electronics |
Microelectronics |
Circuits and Systems |
Processor Architectures |
Electronics and Microelectronics, Instrumentation |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Nota di bibliografia |
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Includes bibliographical references and index. |
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Nota di contenuto |
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State of the Art Programmable Logic -- Vivado Design Tools -- IP Flows -- Gigabit Transceivers -- Memory Controllers -- Processor Options -- Vivado IP Integrator -- SysGen for DSP -- Synthesis -- C Based Design -- Simulation -- Clocking -- Stacked Silicon Interconnect -- Timing Closure -- Power Analysis and Optimization -- System Monitor -- Hardware Debug -- Emulation Using FPGAs -- Partial Reconfiguration & Hierarchical Design. |
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Sommario/riassunto |
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This book helps readers to implement their designs on Xilinx® FPGAs. The authors demonstrate how to get the greatest impact from using the Vivado® Design Suite, which delivers a SoC-strength, IP-centric and system-centric, next generation development environment that has been built from the ground up to address the productivity bottlenecks in system-level integration and implementation. This book is a hands-on guide for both users who are new to FPGA designs, as well as those currently using the legacy Xilinx tool set (ISE) but are now moving to Vivado. Throughout the presentation, the authors focus on key |
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concepts, major mechanisms for design entry, and methods to realize the most efficient implementation of the target design, with the least number of iterations. |
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