Ultra low power electronics and adiabatic solutions / / Hervé Fanet

• Record Nr.: UNINA9910135035903321
• Autore: Fanet Hervé
• Pubbl/distr/stampa: London, England ; ; Hoboken, New Jersey : , : ISTE : , : Wiley, , 2016; ©2016
• ISBN: 1-119-00658-9; 1-119-00655-4; 1-119-00654-6
• Descrizione fisica: 1 online resource (343 p.)
• Collana: Electronics Engineering Series
• Disciplina: 621.317
• Soggetti: Power electronics; Low voltage systems
• Lingua di pubblicazione: Inglese
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Note generali: Description based upon print version of record.
• Nota di bibliografia: Includes bibliographical references and index.
• Nota di contenuto: Cover ; Title Page ; Copyright; Contents; Introduction; 1. Dissipation Sources in Electronic Circuits; 1.1. Brief description of logic types ; 1.1.1. Boolean logic; 1.1.2. Combinational and sequential logic ; 1.1.3. NMOS and PMOS transistors; 1.1.4. Complementary CMOS logic; 1.1.5. Pass-transistor logic; 1.1.6. Dynamic logic; 1.2. Origins of heat dissipation in circuits ; 1.2.1. Joule effect in circuits; 1.2.2. Calculating dynamic power; 1.2.3. Calculating static power and its origins; 2. Thermodynamics and Information Theory; 2.1. Recalling the basics: entropy and information; 2.1.1. Statistical definition of entropy2.1.2. Macroscopic energy and entropy; 2.1.3. Thermostat exchange, Boltzmann's law and the equal division of energy; 2.1.4. Summary and example of energy production in a conductor carrying a current; 2.1.5. Information and the associated entropy; 2.2. Presenting Landauer's principle; 2.2.1. Presenting Landauer's principle and other examples; 2.2.2. Experimental validations of Landauer's principle; 2.3. Adiabaticity and reversibility ; 2.3.1. Adiabatic principle of charging capacitors; 2.3.2. Adiabaticity and reversibility: a circuit approach; 3. Transistor Models in CMOS Technology3.1. Reminder on semiconductor properties ; 3.1.1. State densities and semiconductor ; properties; 3.1.2. Currents in a semiconductor; 3.1.3. Contact potentials; 3.1.4. Metal-oxide semiconductor structure; 3.1.5. Weak and strong inversion; 3.2. Long- and short-channel static models ; 3.2.1. Basic principle and brief history of semiconductor technology; 3.2.2. Transistor architecture and Fermi pseudo-potentials; 3.2.3. Calculating the current in a long-channel static regime; 3.2.4. Calculating the current in a short-channel regime; 3.3. Dynamic transistor models3.3.1. Quasi-static regime; 3.3.2. Dynamic regime; 3.3.3. "Small signals" transistor model; 4. Practical and Theoretical Limits of CMOS Technology; 4.1. Speed-dissipation trade-off and limits of CMOS technology ; 4.1.1. From the transistor to the integrated circuit; 4.1.2. Trade-off between speed and consumption; 4.1.3. The trade-off between dynamic consumption and static consumption; 4.2. Sub-threshold regimes ; 4.2.1. Recall of the weak inversion properties; 4.2.2. Limits to sub-threshold CMOS technology; 4.3. Practical and theoretical limits in CMOS technology 4.3.1. Economic considerations and evolving methodologies; 4.3.2. Technological difficulties: dissipation, variability and interconnects; 4.3.3. Theoretical limits and open questions; 5. Very Low Consumption at System Level; 5.1. The evolution of power management technologies ; 5.1.1. Basic techniques for reducing dynamic power; 5.1.2. Basic techniques for reducing static power; 5.1.3. Designing in 90, 65 and 45 nm technology; 5.2. Sub-threshold integrated circuits ; 5.2.1. Sub-threshold circuit features; 5.2.2. Pipeline and parallelization