1.

Record Nr.

UNINA9910134862503321

Autore

Ndjountche Tertulien

Titolo

Digital electronics . 1 Combinational logic circuits / / Tertulien Ndjountche

Pubbl/distr/stampa

London, England ; ; Hoboken, New Jersey : , : ISTE : , : Wiley, , 2016

©2016

ISBN

1-119-31864-5

1-119-31863-7

1-119-31862-9

Descrizione fisica

1 online resource (288 p.)

Disciplina

621.38195835

Soggetti

Logic circuits

Lingua di pubblicazione

Inglese

Formato

Materiale a stampa

Livello bibliografico

Monografia

Note generali

Description based upon print version of record.

Nota di bibliografia

Includes bibliographical references and index.

Nota di contenuto

Intro; Table of Contents; Title; Copyright; Preface; 1 Number Systems; 2 Logic Gates; 3 Function Blocks of Combinational Logic; 4 Systematic Methods for the Simplification of Logic Functions; Bibliography; Index; End User License Agreement; 1. Summary; 2. The reader; 1.1. Introduction; 1.2. Decimal numbers; 1.3. Binary numbers; 1.4. Octal numbers; 1.5. Hexadecimal numeration; 1.6. Representation in a radix B; 1.7. Binary-coded decimal numbers; 1.8. Representations of signed integers; 1.9. Representation of the fractional part of a number; 1.10. Arithmetic operations on binary numbers

1.11. Representation of real numbers1.12. Data representation; 1.13. Codes to protect against errors; 1.14. Exercises; 1.15. Solutions; 2.1. Introduction; 2.2. Logic gates; 2.3. Three-state buffer; 2.4. Logic function; 2.5. The correspondence between a truth table and a logic function; 2.6. Boolean algebra; 2.7. Multi-level logic circuit implementation; 2.8. Practical considerations; 2.9. Demonstration of some Boolean algebra identities; 2.10. Exercises; 2.11. Solutions; 3.1. Introduction; 3.2. Multiplexer; 3.3. Demultiplexer and decoder

3.4. Implementation of logic functions using multiplexers or decoders3.5. Encoders; 3.6. Transcoders; 3.7. Parity check generator; 3.8. Barrel shifter; 3.9. Exercises; 3.10. Solutions; 4.1. Introduction; 4.2. Definitions and reminders; 4.3. Karnaugh maps; 4.4. Systematic



methods for simplification; 4.5. Exercises; 4.6. Solutions